nrf52/include/periph_cpu.h

nRF52 specific definitions for handling peripherals

CLOCK_CORECLOCK

System core clock speed, fixed to 64MHz for all NRF52x CPUs.

1
(64000000U)
PERIPH_CLOCK
1
(16000000U)
UART_IRQN

Redefine some peripheral names to unify them between nRF51 and 52.

1
(UARTE0_UART0_IRQn)
SPI_SCKSEL
1
(dev(bus)->PSEL.SCK)
SPI_MOSISEL
1
(dev(bus)->PSEL.MOSI)
SPI_MISOSEL
1
(dev(bus)->PSEL.MISO)
HAVE_ADC_RES_T

Override ADC resolution values.

enum adc_res_t
ADC_RES_7BIT =             (0 << 4)
ADC resolution: 7 bit.
ADC_RES_9BIT =             (1 << 4)
ADC resolution: 9 bit.
ADC_RES_11BIT
ADC resolution: 11 bit.
ADC_RES_6BIT =             (0xa00)
not supported by hardware
ADC_RES_8BIT =             (0xb00)
not supported by hardware
ADC_RES_10BIT =             (2 << 4)
ADC resolution: 10 bit.
ADC_RES_12BIT =             (3 << 4)
ADC resolution: 12 bit.
ADC_RES_14BIT =             (0xc00)
not supported by hardware
ADC_RES_16BIT =             (0xd00)
not supported by hardware
HAVE_I2C_SPEED_T

Override I2C speed settings.

enum i2c_speed_t
I2C_SPEED_LOW = 0x01
not supported
I2C_SPEED_NORMAL = 100000U
normal mode: ~100kbit/s
I2C_SPEED_FAST = 400000U
fast mode: ~400kbit/s
I2C_SPEED_FAST_PLUS = 0x02
not supported
I2C_SPEED_HIGH = 0x03
not supported
PERIPH_I2C_NEED_READ_REG
PERIPH_I2C_NEED_WRITE_REG
PWM_CHANNELS
1
(4U)
PWM_MODE( ud, pol)
1
(ud | (pol << 15))
HAVE_PWM_MODE_T

Override the PWM mode definitions.

enum pwm_mode_t
PWM_CENTER_INV = PWM_MODE(1, 0)
not supported
PWM_LEFT = PWM_MODE(0, 1)
left aligned PWM
PWM_RIGHT = PWM_MODE(0, 0)
right aligned PWM
PWM_CENTER = PWM_MODE(1, 1)
not supported
ADC_NUMOF

The nRF52 family of CPUs provides a fixed number of 9 ADC lines.

1
(9U)
enum @77
NRF52_AIN0 = 0
Analog Input 0.
NRF52_AIN1 = 1
Analog Input 1.
NRF52_AIN2 = 2
Analog Input 2.
NRF52_AIN3 = 3
Analog Input 3.
NRF52_AIN4 = 4
Analog Input 4.
NRF52_AIN5 = 5
Analog Input 5.
NRF52_AIN6 = 6
Analog Input 6.
NRF52_AIN7 = 7
Analog Input 7.
NRF52_VDD = 8
VDD, not useful if VDD is reference…
struct i2c_conf_t

I2C configuration options.

Structure for I2C configuration data.

I2C (TWI) configuration options.

I2C configuration structure.

I2C device configuration.

cc2538/include/periph_cpu.h::i2c_speed_t speed

baudrate used for the bus

i2c bus speed

Bus speed.

bus speed

Configured bus speed, actual speed may be lower but never higher.

gpio.h::gpio_t scl_pin

pin used for SCL

scl pin number

used SCL pin

SCL GPIO pin.

gpio.h::gpio_t sda_pin

pin used for SDA

sda pin number

used MOSI pin

SDA GPIO pin.

I2C_TypeDef * dev

USART device used.

i2c device

uint32_t loc

location of I2C pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint32_t speed

the bus speed

I2C_Type * i2c

Pointer to hardware module registers.

uint32_t freq

I2C module clock frequency, usually CLOCK_BUSCLOCK or CLOCK_CORECLOCK.

cc2538.h::IRQn_Type irqn

IRQ number for this module.

uint32_t scl_pcr

PORT module PCR setting for the SCL pin.

uint32_t sda_pcr

PORT module PCR setting for the SDA pin.

NRF_TWI_Type * dev

hardware device

uint8_t pin_scl

SCL pin.

uint8_t pin_sda

SDA pin.

uint8_t ppi

PPI channel to use.

NRF_TWIM_Type * dev

TWIM hardware device.

uint8_t scl

SCL pin.

uint8_t sda

SDA pin.

SercomI2cm * dev

pointer to the used I2C device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternate function (mux)

uint8_t gclk_src

GCLK source which supplys SERCOM.

uint8_t flags

allow SERCOM to run in standby mode

stm32_common/include/periph_cpu_common.h::gpio_af_t scl_af

scl pin alternate function value

stm32_common/include/periph_cpu_common.h::gpio_af_t sda_af

sda pin alternate function value

uint8_t bus

APB bus.

uint32_t rcc_mask

bit in clock enable register

uint8_t irqn

I2C event interrupt number.

struct pwm_conf_t

PWM configuration.

PWM device configuration data structure.

PWM configuration options.

PWM device configuration.

Each device supports up to 4 channels. If you want to use less than 4 channels, just set the unused pins to GPIO_UNDEF.

Note

define unused pins only from right to left, so the defined channels always start with channel 0 to x and the undefined ones are from x+1 to PWM_CHANNELS.

mini_timer_t * dev

Timer used.

gpio.h::gpio_t pin_ch()

Output Pins.

atmega_common/include/periph_cpu_common.h::timer_div_t div

Timer divider mask.

TIMER_TypeDef * dev

TIMER device used.

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint8_t channels

the number of available channels

const pwm_chan_conf_t * channel

pointer to first channel config

NRF_PWM_Type * dev

PWM device descriptor.

uint32_t pin()

PWM out pins.

Tcc * dev

TCC device to use.

pwm_conf_chan_t chan()

channel configuration

TIM_TypeDef * dev

Timer used.

uint32_t rcc_mask

bit in clock enable register

pwm_chan_t chan()

channel mapping, set to {GPIO_UNDEF, 0} if not used

stm32_common/include/periph_cpu_common.h::gpio_af_t af

alternate function used

uint8_t bus

APB bus.