CMSIS Definitions

enum IRQn

GPIO_PORT_A_IRQn =   0

GPIO port A.

GPIO_PORT_B_IRQn =   1

GPIO port B.

GPIO_PORT_C_IRQn =   2

GPIO port C.

GPIO_PORT_D_IRQn =   3

GPIO port D.

UART0_IRQn =   5

UART0.

UART1_IRQn =   6

UART1.

SSI0_IRQn =   7

SSI0.

I2C_IRQn =   8

I2C.

ADC_IRQn =  14

ADC.

WDT_IRQn =  18

Watchdog Timer.

GPTIMER_0A_IRQn =  19

GPTimer 0A.

GPTIMER_0B_IRQn =  20

GPTimer 0B.

GPTIMER_1A_IRQn =  21

GPTimer 1A.

GPTIMER_1B_IRQn =  22

GPTimer 1B.

GPTIMER_2A_IRQn =  23

GPTimer 2A.

GPTIMER_2B_IRQn =  24

GPTimer 2B.

ADC_CMP_IRQn =  25

Analog Comparator.

RF_RXTX_ALT_IRQn =  26

RF TX/RX (Alternate)

RF_ERR_ALT_IRQn =  27

RF Error (Alternate)

SYS_CTRL_IRQn =  28

System Control.

FLASH_CTRL_IRQn =  29

Flash memory control.

AES_ALT_IRQn =  30

AES (Alternate)

PKA_ALT_IRQn =  31

PKA (Alternate)

SM_TIMER_ALT_IRQn =  32

SM Timer (Alternate)

MAC_TIMER_ALT_IRQn =  33

MAC Timer (Alternate)

SSI1_IRQn =  34

SSI1.

GPTIMER_3A_IRQn =  35

GPTimer 3A.

GPTIMER_3B_IRQn =  36

GPTimer 3B.

UDMA_IRQn =  46

uDMA software

UDMA_ERR_IRQn =  47

uDMA error

USB_IRQn = 140

USB.

RF_RXTX_IRQn = 141

RF Core Rx/Tx.

RF_ERR_IRQn = 142

RF Core Error.

AES_IRQn = 143

AES.

PKA_IRQn = 144

PKA.

SM_TIMER_IRQn = 145

SM Timer.

MACTIMER_IRQn = 146

MAC Timer.

PERIPH_COUNT_IRQn = (MACTIMER_IRQn + 1)

Number of peripheral IDs.

ResetHandler_IRQn = -15

1 Reset Handler

NonMaskableInt_IRQn = -14

2 Non Maskable Interrupt

HardFault_IRQn = -13

3 Cortex-M3 Hard Fault Interrupt

MemoryManagement_IRQn = -12

4 Cortex-M3 Memory Management Interrupt

BusFault_IRQn = -11

5 Cortex-M3 Bus Fault Interrupt

UsageFault_IRQn = -10

6 Cortex-M3 Usage Fault Interrupt

SVCall_IRQn = - 5

11 Cortex-M3 SV Call Interrupt

DebugMonitor_IRQn = - 4

12 Cortex-M3 Debug Monitor Interrupt

PendSV_IRQn = - 2

14 Cortex-M3 Pend SV Interrupt

SysTick_IRQn = - 1

15 Cortex-M3 System Tick Interrupt

EDGE_DETECT_IRQN =   0

16 AON edge detect

I2C_IRQN =   1

17 I2C

RF_CPE1_IRQN =   2

18 RF Command and Packet Engine 1

SPIS_IRQN =   3

19 AON SpiSplave Rx, Tx and CS

AON_RTC_IRQN =   4

20 AON RTC

UART0_IRQN =   5

21 UART0 Rx and Tx

AON_AUX_SWEV0_IRQN =   6

22 Sensor Controller software event 0, through AON domain

SSI0_IRQN =   7

23 SSI0 Rx and Tx

SSI1_IRQN =   8

24 SSI1 Rx and Tx

RF_CPE0_IRQN =   9

25 RF Command and Packet Engine 0

RF_HW_IRQN =  10

26 RF Core Hardware

RF_CMD_ACK_IRQN =  11

27 RF Core Command Acknowledge

I2S_IRQN =  12

28 I2S

AON_AUX_SWEV1_IRQN =  13

29 Sensor Controller software event 1, through AON domain

WATCHDOG_IRQN =  14

30 Watchdog timer

GPTIMER_0A_IRQN =  15

31 Timer 0 subtimer A

GPTIMER_0B_IRQN =  16

32 Timer 0 subtimer B

GPTIMER_1A_IRQN =  17

33 Timer 1 subtimer A

GPTIMER_1B_IRQN =  18

34 Timer 1 subtimer B

GPTIMER_2A_IRQN =  19

35 Timer 2 subtimer A

GPTIMER_2B_IRQN =  20

36 Timer 2 subtimer B

GPTIMER_3A_IRQN =  21

37 Timer 3 subtimer A

GPTIMER_3B_IRQN =  22

38 Timer 3 subtimer B

CRYPTO_IRQN =  23

39 Crypto Core Result available

UDMA_IRQN =  24

40 uDMA Software

UDMA_ERR_IRQN =  25

41 uDMA Error

FLASH_CTRL_IRQN =  26

42 Flash controller

SW0_IRQN =  27

43 Software Event 0

AUX_COMBO_IRQN =  28

44 AUX combined event, directly to MCU domain

AON_PRG0_IRQN =  29

45 AON programmable 0

PROG_IRQN =  30

46 Dynamic Programmable interrupt (default source: PRCM)

AUX_COMPA_IRQN =  31

47 AUX Comparator A

AUX_ADC_IRQN =  32

48 AUX ADC IRQ

TRNG_IRQN =  33

49 TRNG event

IRQN_COUNT = (TRNG_IRQN + 1)

Number of peripheral IDs.

enum cc2538.h::IRQn IRQn_Type

Interrupt Number Definition.

void Reset_Handler(void)

Reset handler.

void NMI_Handler(void)

NMI handler.

void HardFault_Handler(void)

Hard fault handler.

void MemManage_Handler(void)

Memory management handler.

void BusFault_Handler(void)

Bus fault handler.

void UsageFault_Handler(void)

Usage fault handler.

void SVC_Handler(void)

SVC handler.

void DebugMon_Handler(void)

Debug monitor handler.

void PendSV_Handler(void)

PendSV handler.

void SysTick_Handler(void)

SysTick handler.

__CM3_REV

Configuration of the Cortex-M3 Processor and Core Peripherals.

0x0200

CC2538 core revision number ([15:8] revision number, [7:0] patch number)

__MPU_PRESENT

CC2538 does provide a MPU.

1

__NVIC_PRIO_BITS

CC2538 uses 3 Bits for the Priority Levels.

3

__Vendor_SysTickConfig

Set to 1 if different SysTick Config is used.

0