STM32 Nucleo-F334R8¶
Support for the STM32 Nucleo-F334R8.
Overview¶
The Nucleo-F334 is a board from ST’s Nucleo family supporting a ARM Cortex-M4 STM32F334R8 microcontroller with 12Kb of RAM and 64Kb or ROM.
Hardware¶
MCU¶
MCU | STM32F091RC |
---|---|
Family | ARM Cortex-M4 |
Vendor | ST Microelectronics |
RAM | 12Kb |
Flash | 64Kb |
Frequency | up to 72MHz) |
FPU | yes |
Timers | 9 (8x 16-bit, 1x 32-bit [TIM2]) |
ADCs | 2x 12-bit |
UARTs | 8 |
SPIs | 1 |
I2Cs | 1 |
RTC | 1 |
Vcc | 2.0V - 3.6V |
Datasheet | Datasheet |
Reference Manual | Reference Manual |
Programming Manual | Programming Manual |
Board Manual | Board Manual |
MCU¶
MCU | STM32F091RC |
---|---|
Family | ARM Cortex-M4 |
Vendor | ST Microelectronics |
RAM | 12Kb |
Flash | 64Kb |
Frequency | up to 72MHz) |
FPU | yes |
Timers | 9 (8x 16-bit, 1x 32-bit [TIM2]) |
ADCs | 2x 12-bit |
UARTs | 8 |
SPIs | 1 |
I2Cs | 1 |
RTC | 1 |
Vcc | 2.0V - 3.6V |
Datasheet | Datasheet |
Reference Manual | Reference Manual |
Programming Manual | Programming Manual |
Board Manual | Board Manual |
Implementation Status¶
Device | ID | Supported | Comments |
---|---|---|---|
MCU | STM32F334R8 | partly | Energy saving modes not fully utilized |
Low-level driver | GPIO | yes | |
PWM | no | ||
UART | one UART | ||
I2C | no | ||
SPI | one SPI | ||
USB | no | ||
Timer | one 32 timer |
Flashing the device¶
The ST Nucleo-F334R8 board includes an on-board ST-LINK V2 programmer. The easiest way to program the board is to use OpenOCD. Once you have installed OpenOCD (look here for installation instructions), you can flash the board simply by typing
1 | make flash
|
1 | make debug
|
Supported Toolchains¶
For using the ST Nucleo-F334R8 board we strongly recommend the usage of the GNU Tools for ARM Embedded Processors toolchain.
-
CLOCK_CORECLOCK
¶ 1
(72000000U)
-
CLOCK_HSE
¶ 1
(8000000U)
-
CLOCK_LSE
¶ 1
(1)
-
CLOCK_AHB_DIV
¶ 1
RCC_CFGR_HPRE_DIV1
-
CLOCK_AHB
¶ 1
(CLOCK_CORECLOCK / 1)
-
CLOCK_APB1_DIV
¶ 1
RCC_CFGR_PPRE1_DIV2 /* max 36MHz */
-
CLOCK_APB1
¶ 1
(CLOCK_CORECLOCK / 2)
-
CLOCK_APB2_DIV
¶ 1
RCC_CFGR_PPRE2_DIV1 /* max 72MHz */
-
CLOCK_APB2
¶ 1
(CLOCK_CORECLOCK / 1)
-
CLOCK_PLL_PREDIV
¶ 1
(1)
-
CLOCK_PLL_MUL
¶ 1
(9)
-
const timer_conf_t
timer_config
()¶ 1 2 3 4 5 6 7 8 9
= { { .dev = TIM2, .max = 0xffffffff, .rcc_mask = RCC_APB1ENR_TIM2EN, .bus = APB1, .irqn = TIM2_IRQn } }
-
TIMER_0_ISR
¶ 1
(isr_tim2)
-
TIMER_NUMOF
¶ 1
(sizeof(timer_config) / sizeof(timer_config[0]))
-
const uart_conf_t
uart_config
()¶
-
UART_0_ISR
¶ 1
(isr_usart2)
-
UART_1_ISR
¶ 1
(isr_usart1)
-
UART_2_ISR
¶ 1
(isr_usart3)
-
UART_NUMOF
¶ 1
(sizeof(uart_config) / sizeof(uart_config[0]))
-
const pwm_conf_t
pwm_config
()¶ 1 2 3 4 5 6 7 8 9 10 11 12
= { { .dev = TIM3, .rcc_mask = RCC_APB1ENR_TIM3EN, .chan = { { .pin = GPIO_PIN(PORT_C, 6), .cc_chan = 0 }, { .pin = GPIO_PIN(PORT_C, 7), .cc_chan = 1 }, { .pin = GPIO_PIN(PORT_C, 8), .cc_chan = 2 }, { .pin = GPIO_PIN(PORT_C, 9), .cc_chan = 3 } }, .af = GPIO_AF2, .bus = APB1 } }
-
PWM_NUMOF
¶ 1
(sizeof(pwm_config) / sizeof(pwm_config[0]))
-
const uint8_t
spi_divtable
()¶ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
= { { 7, 6, 4, 2, 1 }, { 7, 7, 5, 3, 2 } }
-
const spi_conf_t
spi_config
()¶ 1 2 3 4 5 6 7 8 9 10 11 12
= { { .dev = SPI1, .mosi_pin = GPIO_PIN(PORT_A, 7), .miso_pin = GPIO_PIN(PORT_A, 6), .sclk_pin = GPIO_PIN(PORT_A, 5), .cs_pin = GPIO_UNDEF, .af = GPIO_AF5, .rccmask = RCC_APB2ENR_SPI1EN, .apbbus = APB2 } }
-
SPI_NUMOF
¶ 1
(sizeof(spi_config) / sizeof(spi_config[0]))