stm32_common/include/periph_cpu_common.h

Shared CPU specific definitions for the STM32 family.

CPUID_LEN

CPU specific LSI clock speed. 

1
(12U)

Length of the CPU_ID in octets

This is the same for all members of the stm32 family

PROVIDES_PM_LAYERED_OFF

We provide our own pm.h::pm_off() function for all STM32-based CPUs.

TIMER_CHAN

All STM timers have 4 capture-compare channels. 

1
(4U)
QDEC_CHAN

All STM QDEC timers have 2 capture channels. 

1
(2U)
PERIPH_SPI_NEEDS_TRANSFER_BYTE

Use the shared SPI functions.

PERIPH_SPI_NEEDS_TRANSFER_REG
PERIPH_SPI_NEEDS_TRANSFER_REGS
STM32_PM_STOP
1
(1U)
STM32_PM_STANDBY
1
(0U)
PERIPH_I2C_NEED_READ_REG

Use read reg function from periph common.

PERIPH_I2C_NEED_WRITE_REG

Use write reg function from periph common.

HAVE_I2C_SPEED_T

Default mapping of I2C bus speed values.

enum i2c_speed_t
I2C_SPEED_LOW = 0x01
not supported
I2C_SPEED_NORMAL = 100000U
normal mode: ~100kbit/s
I2C_SPEED_FAST = 400000U
fast mode: ~400kbit/s
I2C_SPEED_FAST_PLUS = 0x02
not supported
I2C_SPEED_HIGH = 0x03
not supported
PM_NUM_MODES

Number of usable low power modes. 

1
(2U)
GPIO_UNDEF

Definition of a fitting UNDEF value. 

1
(0xffffffff)
GPIO_PIN( x, y)

Define a CPU specific GPIO pin generator macro. 

1
((GPIOA_BASE + (x << 10)) | y)
SPI_HWCS_MASK

Define a magic number that tells us to use hardware chip select. 

1
(0xffffff00)

We use a random value here, that does clearly differentiate from any possible stm32_common/include/periph_cpu_common.h::GPIO_PIN value.

SPI_HWCS( x)

Override the default SPI hardware chip select access macro. 

1
(SPI_HWCS_MASK | x)

Since the CPU does only support one single hardware chip select line, we can detect the usage of non-valid lines by comparing to SPI_HWCS_VALID.

GPIO_MODE( io, pr, ot)

Generate GPIO mode bitfields. 

1
((io << 0) | (pr << 2) | (ot << 4))

We use 5 bit to encode the mode:

  • bit 0+1: pin mode (input / output)
  • bit 2+3: pull resistor configuration
  • bit 4: output type (0: push-pull, 1: open-drain)

enum bus_t
APB1
APB1 bus.
APB2
APB2 bus.
enum gpio_af_t
GPIO_AF0 = 0
use alternate function 0
GPIO_AF1
use alternate function 1
GPIO_AF2
use alternate function 2
GPIO_AF3
use alternate function 3
GPIO_AF4
use alternate function 4
GPIO_AF5
use alternate function 5
GPIO_AF6
use alternate function 6
GPIO_AF7
use alternate function 7
GPIO_AF8
use alternate function 8
GPIO_AF9
use alternate function 9
GPIO_AF10
use alternate function 10
GPIO_AF11
use alternate function 11
GPIO_AF12
use alternate function 12
GPIO_AF13
use alternate function 13
GPIO_AF14
use alternate function 14
GPIO_AF15
use alternate function 15
uint32_t periph_apb_clk(uint8_t bus)

Get the actual bus clock frequency for the APB buses.

Parameters

bus:target APBx bus

Return values

  • bus clock frequency in Hz
uint32_t periph_timer_clk(uint8_t bus)

Get the actual timer clock frequency.

Parameters

bus:corresponding APBx bus

Return values

  • timer clock frequency in Hz
void periph_clk_en(stm32_common/include/periph_cpu_common.h::bus_t bus, uint32_t mask)

Enable the given peripheral clock.

Parameters

bus:bus the peripheral is connected to
mask:bit in the RCC enable register

void periph_clk_dis(stm32_common/include/periph_cpu_common.h::bus_t bus, uint32_t mask)

Disable the given peripheral clock.

Parameters

bus:bus the peripheral is connected to
mask:bit in the RCC enable register

void gpio_init_af(gpio.h::gpio_t pin, stm32_common/include/periph_cpu_common.h::gpio_af_t af)

Configure the alternate function for the given pin.

Parameters

pin:pin to configure
af:alternate function to use

void gpio_init_analog(gpio.h::gpio_t pin)

Configure the given pin to be used as ADC input.

Parameters

pin:pin to configure

struct dac_conf_t

DAC line configuration data.

gpio.h::gpio_t pin

pin connected to the line

uint8_t chan

DAC device used for this line.

struct timer_conf_t

Timer configuration.

Timer configuration data.

Timer configuration options.

Define timer configuration values.

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e. if multiple timers are enabled.

Note

The two timers must be adjacent to each other (e.g. TIMER0 and TIMER1, or TIMER2 and TIMER3, etc.).

uint_fast8_t chn

number of channels

uint_fast8_t cfg

timer config word

timer_dev_t prescaler

the lower numbered neighboring timer

timer_dev_t timer

the higher numbered timer

cc2538.h::IRQn_Type irq

number of the higher timer IRQ channel

TIMER_TypeDef * prescaler

the lower numbered neighboring timer

TIMER_TypeDef * timer

the higher numbered timer

uint8_t pre_cmu

prescale timer bit in CMU register, the timer bit is deducted from this

uint8_t irqn

number of the higher timer IRQ channel

global IRQ channel

IRQ number of the timer device.

NRF_TIMER_Type * dev

timer device

uint8_t channels

number of channels available

uint8_t bitmode

counter width

Tc * dev

timer device

uint8_t id_ch0

ID of the timer’s first channel.

TIM_TypeDef * dev

timer device

uint32_t max

maximum value to count to (16/32 bit)

uint32_t rcc_mask

corresponding bit in the RCC register

uint8_t bus

APBx bus the timer is clock from.

struct pwm_chan_t

PWM channel.

gpio.h::gpio_t pin

GPIO pin mapped to this channel.

uint8_t cc_chan

capture compare channel used

struct pwm_conf_t

PWM configuration.

PWM device configuration data structure.

PWM configuration options.

PWM device configuration.

Each device supports up to 4 channels. If you want to use less than 4 channels, just set the unused pins to GPIO_UNDEF.

Note

define unused pins only from right to left, so the defined channels always start with channel 0 to x and the undefined ones are from x+1 to PWM_CHANNELS.

mini_timer_t * dev

Timer used.

gpio.h::gpio_t pin_ch()

Output Pins.

atmega_common/include/periph_cpu_common.h::timer_div_t div

Timer divider mask.

TIMER_TypeDef * dev

TIMER device used.

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint8_t channels

the number of available channels

const pwm_chan_conf_t * channel

pointer to first channel config

NRF_PWM_Type * dev

PWM device descriptor.

uint32_t pin()

PWM out pins.

Tcc * dev

TCC device to use.

pwm_conf_chan_t chan()

channel configuration

TIM_TypeDef * dev

Timer used.

uint32_t rcc_mask

bit in clock enable register

pwm_chan_t chan()

channel mapping, set to {GPIO_UNDEF, 0} if not used

stm32_common/include/periph_cpu_common.h::gpio_af_t af

alternate function used

uint8_t bus

APB bus.

struct qdec_chan_t

QDEC channel.

gpio.h::gpio_t pin

GPIO pin mapped to this channel.

uint8_t cc_chan

capture compare channel used

struct qdec_conf_t

QDEC configuration.

TIM_TypeDef * dev

Timer used.

uint32_t max

Maximum counter value.

uint32_t rcc_mask

bit in clock enable register

qdec_chan_t chan()

channel mapping, set to {GPIO_UNDEF, 0} if not used

stm32_common/include/periph_cpu_common.h::gpio_af_t af

alternate function used

uint8_t bus

APB bus.

uint8_t irqn

global IRQ channel

struct uart_conf_t

UART device configuration.

Structure for UART configuration data.

UART configuration data.

UART module configuration options.

cc2538_uart_t * dev

pointer to the used UART device

UART device base register address.

Pointer to module hardware registers.

gpio.h::gpio_t rx_pin

pin used for RX

RX pin.

Pin used for RX.

gpio.h::gpio_t tx_pin

pin used for TX

TX pin.

Pin used for TX.

gpio.h::gpio_t cts_pin

CTS pin - set to GPIO_UNDEF when not using.

gpio.h::gpio_t rts_pin

RTS pin - set to GPIO_UNDEF when not using.

void * dev

UART, USART or LEUART device used.

Pointer to module hardware registers.

uint32_t loc

location of UART pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

USART_TypeDef * dev

USART device used.

UART device base register address.

uint8_t loc

location of USART pins (AF)

uint8_t cmu

the device CMU channel

uint8_t irq

the devices base IRQ channel

uint32_t freq

Module clock frequency, usually CLOCK_CORECLOCK or CLOCK_BUSCLOCK.

gpio.h::gpio_t pin_rx

RX pin, GPIO_UNDEF disables RX.

gpio.h::gpio_t pin_tx

TX pin.

uint32_t pcr_rx

Pin configuration register bits for RX.

uint32_t pcr_tx

Pin configuration register bits for TX.

uint32_t * scgc_addr

Clock enable register, in SIM module.

uint8_t scgc_bit

Clock enable bit, within the register.

kinetis/include/periph_cpu.h::uart_mode_t mode

UART mode: data bits, parity, stop bits.

kinetis/include/periph_cpu.h::uart_type_t type

Hardware module type (KINETIS_UART or KINETIS_LPUART)

SercomUsart * dev

pointer to the used UART device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternative function for pins

MUX used for pins.

sam0_common/include/periph_cpu_common.h::uart_rxpad_t rx_pad

pad selection for RX line

sam0_common/include/periph_cpu_common.h::uart_txpad_t tx_pad

pad selection for TX line

sam0_common/include/periph_cpu_common.h::uart_flag_t flags

set optional SERCOM flags

uint32_t gclk_src

GCLK source which supplys SERCOM.

Uart * dev

U(S)ART device used.

uint8_t pmc_id

bit in the PMC register of the device

cc2538.h::IRQn_Type irqn

IRQ number for this module.

IRQ channel.

uint32_t rcc_mask

bit in clock enable register

stm32_common/include/periph_cpu_common.h::gpio_af_t rx_af

alternate function for RX pin

stm32_common/include/periph_cpu_common.h::gpio_af_t tx_af

alternate function for TX pin

uint8_t bus

APB bus.

struct spi_conf_t

SPI module configuration options.

Structure for SPI configuration data.

SPI configuration data.

SPI device configuration.

SPI configuration values.

SPI configuration data structure.

uint8_t num

number of SSI device, i.e.

0 or 1

gpio.h::gpio_t mosi_pin

pin used for MOSI

MOSI pin.

used MOSI pin

gpio.h::gpio_t miso_pin

pin used for MISO

MISO pin.

used MISO pin

gpio.h::gpio_t sck_pin

pin used for SCK

gpio.h::gpio_t cs_pin

pin used for CS

HWCS pin, set to GPIO_UNDEF if not mapped.

SPI_Type * dev

SPI device to use.

gpio.h::gpio_t pin_miso

MISO pin used.

gpio.h::gpio_t pin_mosi

MOSI pin used.

gpio.h::gpio_t pin_clk

CLK pin used.

gpio.h::gpio_t pin_cs()

pins used for HW cs lines

kinetis/include/periph_cpu.h::gpio_pcr_t pcr

alternate pin function values

uint32_t simmask

bit in the SIM register

unsigned long ssi_sysctl

SSI device in sysctl.

unsigned long ssi_base

SSI base address.

unsigned long gpio_sysctl

GPIO device in sysctl.

unsigned long gpio_port

GPIO port.

unsigned long clk

pin used for SCK

unsigned long fss

pin used for FSS

unsigned long rx

pin used for MISO

unsigned long tx

pin used for MOSI

unsigned long mask

Pin mask.

struct spi_conf_t::@74 pins

Pin setting.

NRF_SPI_Type * dev

SPI device used.

uint8_t sclk

CLK pin.

uint8_t mosi

MOSI pin.

uint8_t miso

MISO pin.

SercomSpi * dev

pointer to the used SPI device

gpio.h::gpio_t clk_pin

used CLK pin

sam0_common/include/periph_cpu_common.h::gpio_mux_t miso_mux

alternate function for MISO pin (mux)

sam0_common/include/periph_cpu_common.h::gpio_mux_t mosi_mux

alternate function for MOSI pin (mux)

sam0_common/include/periph_cpu_common.h::gpio_mux_t clk_mux

alternate function for CLK pin (mux)

sam0_common/include/periph_cpu_common.h::spi_misopad_t miso_pad

pad to use for MISO line

sam0_common/include/periph_cpu_common.h::spi_mosipad_t mosi_pad

pad to use for MOSI and CLK line

Spi * dev

SPI module to use.

uint8_t id

corresponding ID of that module

gpio.h::gpio_t clk

pin mapped to the CLK line

gpio.h::gpio_t mosi

pin mapped to the MOSI line

gpio.h::gpio_t miso

pin mapped to the MISO line

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

pin MUX setting

SPI_TypeDef * dev

SPI device base register address.

gpio.h::gpio_t sclk_pin

SCLK pin.

stm32_common/include/periph_cpu_common.h::gpio_af_t af

pin alternate function

uint32_t rccmask

bit in the RCC peripheral enable register

uint8_t apbbus

APBx bus the device is connected to.

struct i2c_conf_t

I2C configuration options.

Structure for I2C configuration data.

I2C (TWI) configuration options.

I2C configuration structure.

I2C device configuration.

cc2538/include/periph_cpu.h::i2c_speed_t speed

baudrate used for the bus

i2c bus speed

Bus speed.

bus speed

Configured bus speed, actual speed may be lower but never higher.

gpio.h::gpio_t scl_pin

pin used for SCL

scl pin number

used SCL pin

SCL GPIO pin.

gpio.h::gpio_t sda_pin

pin used for SDA

sda pin number

used MOSI pin

SDA GPIO pin.

I2C_TypeDef * dev

USART device used.

i2c device

uint32_t loc

location of I2C pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint32_t speed

the bus speed

I2C_Type * i2c

Pointer to hardware module registers.

uint32_t freq

I2C module clock frequency, usually CLOCK_BUSCLOCK or CLOCK_CORECLOCK.

cc2538.h::IRQn_Type irqn

IRQ number for this module.

uint32_t scl_pcr

PORT module PCR setting for the SCL pin.

uint32_t sda_pcr

PORT module PCR setting for the SDA pin.

NRF_TWI_Type * dev

hardware device

uint8_t pin_scl

SCL pin.

uint8_t pin_sda

SDA pin.

uint8_t ppi

PPI channel to use.

NRF_TWIM_Type * dev

TWIM hardware device.

uint8_t scl

SCL pin.

uint8_t sda

SDA pin.

SercomI2cm * dev

pointer to the used I2C device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternate function (mux)

uint8_t gclk_src

GCLK source which supplys SERCOM.

uint8_t flags

allow SERCOM to run in standby mode

stm32_common/include/periph_cpu_common.h::gpio_af_t scl_af

scl pin alternate function value

stm32_common/include/periph_cpu_common.h::gpio_af_t sda_af

sda pin alternate function value

uint8_t bus

APB bus.

uint32_t rcc_mask

bit in clock enable register

uint8_t irqn

I2C event interrupt number.