mpu.h¶
Cortex-M Memory Protection Unit (MPU) Driver Header File.
-
MPU_NUM_REGIONS
¶ Number of MPU regions available (will vary depending on the Cortex-M version)
1
( (MPU->TYPE & MPU_TYPE_DREGION_Msk) >> MPU_TYPE_DREGION_Pos )
-
MPU_SIZE_TO_BYTES
( size)¶ convert a region size code to a size in bytes
1
( (uintptr_t)1 << ((size) + 1) )
Parameters
size: region size code, e.g. MPU_SIZE_32B Return values
- region size in bytes
-
enum
@67
¶ - AP_NO_NO
= 0
- no access for all levels
- AP_RW_NO
= 1
- read/write for privileged level, no access from user level
- AP_RW_RO
= 2
- read/write for privileged level, read-only for user level
- AP_RW_RW
= 3
- read/write for all levels
- AP_RO_NO
= 5
- read-only for privileged level, no access from user level
- AP_RO_RO
= 6
- read-only for all levels
- AP_NO_NO
-
enum
@68
¶ - MPU_SIZE_32B
= 4
- 32 bytes
- MPU_SIZE_64B
= 5
- 64 bytes
- MPU_SIZE_128B
= 6
- 128 bytes
- MPU_SIZE_256B
= 7
- 256 bytes
- MPU_SIZE_512B
= 8
- 512 bytes
- MPU_SIZE_1K
= 9
- 1 kilobytes
- MPU_SIZE_2K
= 10
- 2 kilobytes
- MPU_SIZE_4K
= 11
- 4 kilobytes
- MPU_SIZE_8K
= 12
- 8 kilobytes
- MPU_SIZE_16K
= 13
- 16 kilobytes
- MPU_SIZE_32K
= 14
- 32 kilobytes
- MPU_SIZE_64K
= 15
- 64 kilobytes
- MPU_SIZE_128K
= 16
- 128 kilobytes
- MPU_SIZE_256K
= 17
- 256 kilobytes
- MPU_SIZE_512K
= 18
- 512 kilobytes
- MPU_SIZE_1M
= 19
- 1 megabytes
- MPU_SIZE_2M
= 20
- 2 megabytes
- MPU_SIZE_4M
= 21
- 4 megabytes
- MPU_SIZE_8M
= 22
- 8 megabytes
- MPU_SIZE_16M
= 23
- 16 megabytes
- MPU_SIZE_32M
= 24
- 32 megabytes
- MPU_SIZE_64M
= 25
- 64 megabytes
- MPU_SIZE_128M
= 26
- 128 megabytes
- MPU_SIZE_256M
= 27
- 256 megabytes
- MPU_SIZE_512M
= 28
- 512 megabytes
- MPU_SIZE_1G
= 29
- 1 gigabytes
- MPU_SIZE_2G
= 30
- 2 gigabytes
- MPU_SIZE_4G
= 31
- 4 gigabytes
- MPU_SIZE_32B
-
uint32_t
MPU_ATTR
(uint32_t xn, uint32_t ap, uint32_t tex, uint32_t c, uint32_t b, uint32_t s, uint32_t size)¶ generate an MPU attribute word suitable for writing to the RASR register
Parameters
xn: eXecute Never flag (forbids instruction fetches) ap: Access Permission word, e.g. AP_RO_RO tex: Type Extension Field c: Cacheable bit b: Bufferable bit s: Sub-Region Disable (SRD) field size: region size code, e.g. MPU_SIZE_32B Return values
- combined region attribute word
-
int
mpu_disable
(void)¶ disable the MPU
Return values
- 0 on success
- <0 on failure or no MPU present
-
int
mpu_enable
(void)¶ enable the MPU
Return values
- 0 on success
- <0 on failure or no MPU present
-
bool
mpu_enabled
(void)¶ test if the MPU is enabled
Return values
- true if enabled
- false if disabled
-
int
mpu_configure
(uint_fast8_t region, uintptr_t base, uint_fast32_t attr)¶ configure the base address and attributes for an MPU region
Parameters
region: MPU region to configure (0 <= region
< MPU_NUM_REGIONS)base: base address in RAM (aligned to the size specified within attr
)attr: attribute word generated by mpu.h::MPU_ATTR()
Return values
- 0 on success
- <0 on failure or no MPU present