efm32/include/periph_cpu.h

CPU specific definitions for internal peripheral handling.

LOW_POWER_ENABLED

Enable support for Low-power peripherals (if supported by CPU).

(1)

HAVE_GPIO_T

Define a custom type for GPIO pins.

uint32_t gpio_t

HAVE_HWCRYPTO_AES128

Override hardware crypto supported methods.

PERIPH_I2C_NEED_READ_REG

Declare needed generic I2C functions.

PERIPH_I2C_NEED_WRITE_REG

PERIPH_SPI_NEEDS_INIT_CS

Declare needed generic SPI functions.

PERIPH_SPI_NEEDS_TRANSFER_BYTE

PERIPH_SPI_NEEDS_TRANSFER_REG

PERIPH_SPI_NEEDS_TRANSFER_REGS

UART_MODE_8N1

Internal, pre-defined UART modes.

UART_MODE(8, 1, 0)

UART_MODE_8E1

UART_MODE(8, 1, 2)

ADC_MODE( x, y)

Internal macro for combining ADC resolution (x) with number of shifts (y).

((y << 4) | x)

ADC_MODE_UNDEF( x)

Internal define to note that resolution is not supported.

(ADC_MODE(x, 15))

CPUID_LEN

Length of CPU ID in octets.

(8U)

GPIO_UNDEF

Definition of a fitting UNDEF value.

(0xffffffff)

GPIO_PIN( x, y)

Mandatory function for defining a GPIO pins.

((gpio_t) ((x << 4) | y))

GPIO_MODE( x, y)

Internal macro for combining pin mode (x) and pull-up/down (y).

((x << 1) | y)

UART_MODE( x, y, z)

Internal macro for combining UART modes data bits (x), stop bits (y, in half bits) and parity (z).

((z << 8) | ((y * 2) << 4) | x)

PROVIDES_PM_LAYERED_OFF

CPU provides own pm.h::pm_off() function.

PM_NUM_MODES

Number of usable power modes.

(2U)

enum @69

struct adc_conf_t

ADC device configuration.

Available number of ADC devices.

ADC channel configuration data.

ADC line configuration values.

CPU specific ADC configuration.

ADC channel configuration data

CMU_Clock_TypeDef cmu

the device CMU channel

ADC_Type * dev

ADC module.

gpio.h::gpio_t pin

pin to use

pin connected to the channel

Use GPIO_UNDEF non-muxed ADC pins, e.g. ADC0_DP, or for internal channels, e.g. Bandgap

uint8_t chan

ADC channel.

CPU ADC channel connected to the pin.

internal channel the pin is connected to

Written as-is to ADCx_SC1x before conversion. This also decides single-ended or differential sampling, see CPU reference manual for ADCx_SC1x

uint8_t avg

Hardware averaging configuration.

Written as-is to ADCx_SC3 before conversion, use kinetis/include/periph_cpu.h::ADC_AVG_NONE and kinetis/include/periph_cpu.h::ADC_AVG_MAX as a shorthand notation in the board configuration

ADC_TypeDef * dev

ADC device used.

ADCx - 1 device used for the channel.

struct adc_chan_conf_t

ADC channel configuration.

uint8_t dev

device index

ADC_PosSel_TypeDef input

input channel

ADC_Ref_TypeDef reference

channel voltage reference

ADC_AcqTime_TypeDef acq_time

channel acquisition time

struct i2c_conf_t

I2C configuration options.

Structure for I2C configuration data.

I2C (TWI) configuration options.

I2C configuration structure.

I2C device configuration.

cc2538/include/periph_cpu.h::i2c_speed_t speed

baudrate used for the bus

i2c bus speed

Bus speed.

bus speed

Configured bus speed, actual speed may be lower but never higher.

gpio.h::gpio_t scl_pin

pin used for SCL

scl pin number

used SCL pin

SCL GPIO pin.

gpio.h::gpio_t sda_pin

pin used for SDA

sda pin number

used MOSI pin

SDA GPIO pin.

I2C_TypeDef * dev

USART device used.

i2c device

uint32_t loc

location of I2C pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint32_t speed

the bus speed

I2C_Type * i2c

Pointer to hardware module registers.

uint32_t freq

I2C module clock frequency, usually CLOCK_BUSCLOCK or CLOCK_CORECLOCK.

cc2538.h::IRQn_Type irqn

IRQ number for this module.

uint32_t scl_pcr

PORT module PCR setting for the SCL pin.

uint32_t sda_pcr

PORT module PCR setting for the SDA pin.

NRF_TWI_Type * dev

hardware device

uint8_t pin_scl

SCL pin.

uint8_t pin_sda

SDA pin.

uint8_t ppi

PPI channel to use.

NRF_TWIM_Type * dev

TWIM hardware device.

uint8_t scl

SCL pin.

uint8_t sda

SDA pin.

SercomI2cm * dev

pointer to the used I2C device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternate function (mux)

uint8_t gclk_src

GCLK source which supplys SERCOM.

uint8_t flags

allow SERCOM to run in standby mode

stm32_common/include/periph_cpu_common.h::gpio_af_t scl_af

scl pin alternate function value

stm32_common/include/periph_cpu_common.h::gpio_af_t sda_af

sda pin alternate function value

uint8_t bus

APB bus.

uint32_t rcc_mask

bit in clock enable register

uint8_t irqn

I2C event interrupt number.

struct pwm_chan_conf_t

PWM channel configuration.

PWM channel configuration data.

uint8_t index

TIMER channel to use.

gpio.h::gpio_t pin

pin used for pwm

GPIO pin connected to the channel.

uint32_t loc

location of the pin

uint8_t hwchan

the HW channel used for a logical channel

struct pwm_conf_t

PWM configuration.

PWM device configuration data structure.

PWM configuration options.

PWM device configuration.

Each device supports up to 4 channels. If you want to use less than 4 channels, just set the unused pins to GPIO_UNDEF.

Note

define unused pins only from right to left, so the defined channels always start with channel 0 to x and the undefined ones are from x+1 to PWM_CHANNELS.

mini_timer_t * dev

Timer used.

gpio.h::gpio_t pin_ch()

Output Pins.

atmega_common/include/periph_cpu_common.h::timer_div_t div

Timer divider mask.

TIMER_TypeDef * dev

TIMER device used.

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint8_t channels

the number of available channels

const pwm_chan_conf_t * channel

pointer to first channel config

NRF_PWM_Type * dev

PWM device descriptor.

uint32_t pin()

PWM out pins.

Tcc * dev

TCC device to use.

pwm_conf_chan_t chan()

channel configuration

TIM_TypeDef * dev

Timer used.

uint32_t rcc_mask

bit in clock enable register

pwm_chan_t chan()

channel mapping, set to {GPIO_UNDEF, 0} if not used

stm32_common/include/periph_cpu_common.h::gpio_af_t af

alternate function used

uint8_t bus

APB bus.

struct spi_dev_t

SPI device configuration.

USART_TypeDef * dev

USART device used.

gpio.h::gpio_t mosi_pin

pin used for MOSI

gpio.h::gpio_t miso_pin

pin used for MISO

gpio.h::gpio_t clk_pin

pin used for CLK

uint32_t loc

location of USART pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

struct timer_dev_t

Define timer configuration values.

Note

The two timers must be adjacent to each other (e.g. TIMER0 and TIMER1, or TIMER2 and TIMER3, etc.).

TIMER_TypeDef * dev

Timer device used.

CMU_Clock_TypeDef cmu

the device CMU channel

struct timer_conf_t

Timer configuration.

Timer configuration data.

Timer configuration options.

Define timer configuration values.

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e. if multiple timers are enabled.

Note

The two timers must be adjacent to each other (e.g. TIMER0 and TIMER1, or TIMER2 and TIMER3, etc.).

uint_fast8_t chn

number of channels

uint_fast8_t cfg

timer config word

timer_dev_t prescaler

the lower numbered neighboring timer

timer_dev_t timer

the higher numbered timer

cc2538.h::IRQn_Type irq

number of the higher timer IRQ channel

TIMER_TypeDef * prescaler

the lower numbered neighboring timer

TIMER_TypeDef * timer

the higher numbered timer

uint8_t pre_cmu

prescale timer bit in CMU register, the timer bit is deducted from this

uint8_t irqn

number of the higher timer IRQ channel

global IRQ channel

IRQ number of the timer device.

NRF_TIMER_Type * dev

timer device

uint8_t channels

number of channels available

uint8_t bitmode

counter width

Tc * dev

timer device

uint8_t id_ch0

ID of the timer’s first channel.

TIM_TypeDef * dev

timer device

uint32_t max

maximum value to count to (16/32 bit)

uint32_t rcc_mask

corresponding bit in the RCC register

uint8_t bus

APBx bus the timer is clock from.

struct uart_conf_t

UART device configuration.

Structure for UART configuration data.

UART configuration data.

UART module configuration options.

cc2538_uart_t * dev

pointer to the used UART device

UART device base register address.

Pointer to module hardware registers.

gpio.h::gpio_t rx_pin

pin used for RX

RX pin.

Pin used for RX.

gpio.h::gpio_t tx_pin

pin used for TX

TX pin.

Pin used for TX.

gpio.h::gpio_t cts_pin

CTS pin - set to GPIO_UNDEF when not using.

gpio.h::gpio_t rts_pin

RTS pin - set to GPIO_UNDEF when not using.

void * dev

UART, USART or LEUART device used.

Pointer to module hardware registers.

uint32_t loc

location of UART pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

USART_TypeDef * dev

USART device used.

UART device base register address.

uint8_t loc

location of USART pins (AF)

uint8_t cmu

the device CMU channel

uint8_t irq

the devices base IRQ channel

uint32_t freq

Module clock frequency, usually CLOCK_CORECLOCK or CLOCK_BUSCLOCK.

gpio.h::gpio_t pin_rx

RX pin, GPIO_UNDEF disables RX.

gpio.h::gpio_t pin_tx

TX pin.

uint32_t pcr_rx

Pin configuration register bits for RX.

uint32_t pcr_tx

Pin configuration register bits for TX.

uint32_t * scgc_addr

Clock enable register, in SIM module.

uint8_t scgc_bit

Clock enable bit, within the register.

kinetis/include/periph_cpu.h::uart_mode_t mode

UART mode: data bits, parity, stop bits.

kinetis/include/periph_cpu.h::uart_type_t type

Hardware module type (KINETIS_UART or KINETIS_LPUART)

SercomUsart * dev

pointer to the used UART device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternative function for pins

MUX used for pins.

sam0_common/include/periph_cpu_common.h::uart_rxpad_t rx_pad

pad selection for RX line

sam0_common/include/periph_cpu_common.h::uart_txpad_t tx_pad

pad selection for TX line

sam0_common/include/periph_cpu_common.h::uart_flag_t flags

set optional SERCOM flags

uint32_t gclk_src

GCLK source which supplys SERCOM.

Uart * dev

U(S)ART device used.

uint8_t pmc_id

bit in the PMC register of the device

cc2538.h::IRQn_Type irqn

IRQ number for this module.

IRQ channel.

uint32_t rcc_mask

bit in clock enable register

stm32_common/include/periph_cpu_common.h::gpio_af_t rx_af

alternate function for RX pin

stm32_common/include/periph_cpu_common.h::gpio_af_t tx_af

alternate function for TX pin

uint8_t bus

APB bus.