cc2538.h

CC2538 MCU interrupt and register definitions.

enum IRQn

GPIO_PORT_A_IRQn =   0

GPIO port A.

GPIO_PORT_B_IRQn =   1

GPIO port B.

GPIO_PORT_C_IRQn =   2

GPIO port C.

GPIO_PORT_D_IRQn =   3

GPIO port D.

UART0_IRQn =   5

UART0.

UART1_IRQn =   6

UART1.

SSI0_IRQn =   7

SSI0.

I2C_IRQn =   8

I2C.

ADC_IRQn =  14

ADC.

WDT_IRQn =  18

Watchdog Timer.

GPTIMER_0A_IRQn =  19

GPTimer 0A.

GPTIMER_0B_IRQn =  20

GPTimer 0B.

GPTIMER_1A_IRQn =  21

GPTimer 1A.

GPTIMER_1B_IRQn =  22

GPTimer 1B.

GPTIMER_2A_IRQn =  23

GPTimer 2A.

GPTIMER_2B_IRQn =  24

GPTimer 2B.

ADC_CMP_IRQn =  25

Analog Comparator.

RF_RXTX_ALT_IRQn =  26

RF TX/RX (Alternate)

RF_ERR_ALT_IRQn =  27

RF Error (Alternate)

SYS_CTRL_IRQn =  28

System Control.

FLASH_CTRL_IRQn =  29

Flash memory control.

AES_ALT_IRQn =  30

AES (Alternate)

PKA_ALT_IRQn =  31

PKA (Alternate)

SM_TIMER_ALT_IRQn =  32

SM Timer (Alternate)

MAC_TIMER_ALT_IRQn =  33

MAC Timer (Alternate)

SSI1_IRQn =  34

SSI1.

GPTIMER_3A_IRQn =  35

GPTimer 3A.

GPTIMER_3B_IRQn =  36

GPTimer 3B.

UDMA_IRQn =  46

uDMA software

UDMA_ERR_IRQn =  47

uDMA error

USB_IRQn = 140

USB.

RF_RXTX_IRQn = 141

RF Core Rx/Tx.

RF_ERR_IRQn = 142

RF Core Error.

AES_IRQn = 143

AES.

PKA_IRQn = 144

PKA.

SM_TIMER_IRQn = 145

SM Timer.

MACTIMER_IRQn = 146

MAC Timer.

PERIPH_COUNT_IRQn = (MACTIMER_IRQn + 1)

Number of peripheral IDs.

ResetHandler_IRQn = -15

1 Reset Handler

NonMaskableInt_IRQn = -14

2 Non Maskable Interrupt

HardFault_IRQn = -13

3 Cortex-M3 Hard Fault Interrupt

MemoryManagement_IRQn = -12

4 Cortex-M3 Memory Management Interrupt

BusFault_IRQn = -11

5 Cortex-M3 Bus Fault Interrupt

UsageFault_IRQn = -10

6 Cortex-M3 Usage Fault Interrupt

SVCall_IRQn = - 5

11 Cortex-M3 SV Call Interrupt

DebugMonitor_IRQn = - 4

12 Cortex-M3 Debug Monitor Interrupt

PendSV_IRQn = - 2

14 Cortex-M3 Pend SV Interrupt

SysTick_IRQn = - 1

15 Cortex-M3 System Tick Interrupt

EDGE_DETECT_IRQN =   0

16 AON edge detect

I2C_IRQN =   1

17 I2C

RF_CPE1_IRQN =   2

18 RF Command and Packet Engine 1

SPIS_IRQN =   3

19 AON SpiSplave Rx, Tx and CS

AON_RTC_IRQN =   4

20 AON RTC

UART0_IRQN =   5

21 UART0 Rx and Tx

AON_AUX_SWEV0_IRQN =   6

22 Sensor Controller software event 0, through AON domain

SSI0_IRQN =   7

23 SSI0 Rx and Tx

SSI1_IRQN =   8

24 SSI1 Rx and Tx

RF_CPE0_IRQN =   9

25 RF Command and Packet Engine 0

RF_HW_IRQN =  10

26 RF Core Hardware

RF_CMD_ACK_IRQN =  11

27 RF Core Command Acknowledge

I2S_IRQN =  12

28 I2S

AON_AUX_SWEV1_IRQN =  13

29 Sensor Controller software event 1, through AON domain

WATCHDOG_IRQN =  14

30 Watchdog timer

GPTIMER_0A_IRQN =  15

31 Timer 0 subtimer A

GPTIMER_0B_IRQN =  16

32 Timer 0 subtimer B

GPTIMER_1A_IRQN =  17

33 Timer 1 subtimer A

GPTIMER_1B_IRQN =  18

34 Timer 1 subtimer B

GPTIMER_2A_IRQN =  19

35 Timer 2 subtimer A

GPTIMER_2B_IRQN =  20

36 Timer 2 subtimer B

GPTIMER_3A_IRQN =  21

37 Timer 3 subtimer A

GPTIMER_3B_IRQN =  22

38 Timer 3 subtimer B

CRYPTO_IRQN =  23

39 Crypto Core Result available

UDMA_IRQN =  24

40 uDMA Software

UDMA_ERR_IRQN =  25

41 uDMA Error

FLASH_CTRL_IRQN =  26

42 Flash controller

SW0_IRQN =  27

43 Software Event 0

AUX_COMBO_IRQN =  28

44 AUX combined event, directly to MCU domain

AON_PRG0_IRQN =  29

45 AON programmable 0

PROG_IRQN =  30

46 Dynamic Programmable interrupt (default source: PRCM)

AUX_COMPA_IRQN =  31

47 AUX Comparator A

AUX_ADC_IRQN =  32

48 AUX ADC IRQ

TRNG_IRQN =  33

49 TRNG event

IRQN_COUNT = (TRNG_IRQN + 1)

Number of peripheral IDs.

enum cc2538.h::IRQn IRQn_Type

Interrupt Number Definition.

void Reset_Handler(void)

Reset handler.

void NMI_Handler(void)

NMI handler.

void HardFault_Handler(void)

Hard fault handler.

void MemManage_Handler(void)

Memory management handler.

void BusFault_Handler(void)

Bus fault handler.

void UsageFault_Handler(void)

Usage fault handler.

void SVC_Handler(void)

SVC handler.

void DebugMon_Handler(void)

Debug monitor handler.

void PendSV_Handler(void)

PendSV handler.

void SysTick_Handler(void)

SysTick handler.

SSI0_CR0

SSI0 Control Register 0.

( *(cc2538_reg_t*)0x40008000 )

SSI0_CR1

SSI0 Control Register 1.

( *(cc2538_reg_t*)0x40008004 )

SSI0_DR

SSI0 Data register.

( *(cc2538_reg_t*)0x40008008 )

SSI0_SR

SSI0 FIFO/busy Status Register.

( *(cc2538_reg_t*)0x4000800c )

SSI0_CPSR

SSI0 Clock Register.

( *(cc2538_reg_t*)0x40008010 )

SSI0_IM

SSI0 Interrupt Mask register.

( *(cc2538_reg_t*)0x40008014 )

SSI0_RIS

SSI0 Raw Interrupt Status register.

( *(cc2538_reg_t*)0x40008018 )

SSI0_MIS

SSI0 Masked Interrupt Status register.

( *(cc2538_reg_t*)0x4000801c )

SSI0_ICR

SSI0 Interrupt Clear Register.

( *(cc2538_reg_t*)0x40008020 )

SSI0_DMACTL

SSI0 uDMA Control Register.

( *(cc2538_reg_t*)0x40008024 )

SSI0_CC

SSI0 clock configuration.

( *(cc2538_reg_t*)0x40008fc8 )

SSI1_CR0

SSI1 Control Register 0.

( *(cc2538_reg_t*)0x40009000 )

SSI1_CR1

SSI1 Control Register 1.

( *(cc2538_reg_t*)0x40009004 )

SSI1_DR

SSI1 Data register.

( *(cc2538_reg_t*)0x40009008 )

SSI1_SR

SSI1 FIFO/busy Status Register.

( *(cc2538_reg_t*)0x4000900c )

SSI1_CPSR

SSI1 Clock Register.

( *(cc2538_reg_t*)0x40009010 )

SSI1_IM

SSI1 Interrupt Mask register.

( *(cc2538_reg_t*)0x40009014 )

SSI1_RIS

SSI1 Raw Interrupt Status register.

( *(cc2538_reg_t*)0x40009018 )

SSI1_MIS

SSI1 Masked Interrupt Status register.

( *(cc2538_reg_t*)0x4000901c )

SSI1_ICR

SSI1 Interrupt Clear Register.

( *(cc2538_reg_t*)0x40009020 )

SSI1_DMACTL

SSI1 uDMA Control Register.

( *(cc2538_reg_t*)0x40009024 )

SSI1_CC

SSI1 clock configuration.

( *(cc2538_reg_t*)0x40009fc8 )

UART0_DR

UART0 Data Register.

( *(cc2538_reg_t*)0x4000c000 )

UART0_ECR

UART0 receive status and error clear.

( *(cc2538_reg_t*)0x4000c004 )

UART0_RSR

UART0 receive status and error clear.

( *(cc2538_reg_t*)0x4000c004 )

UART0_FR

UART0 flag.

( *(cc2538_reg_t*)0x4000c018 )

UART0_ILPR

UART0 IrDA low-power register.

( *(cc2538_reg_t*)0x4000c020 )

UART0_IBRD

UART0 integer baud-rate divisor.

( *(cc2538_reg_t*)0x4000c024 )

UART0_FBRD

UART0 fractional baud-rate divisor.

( *(cc2538_reg_t*)0x4000c028 )

UART0_LCRH

UART0 line control.

( *(cc2538_reg_t*)0x4000c02c )

UART0_CTL

UART0 control.

( *(cc2538_reg_t*)0x4000c030 )

UART0_IFLS

UART0 interrupt FIFO level select.

( *(cc2538_reg_t*)0x4000c034 )

UART0_IM

UART0 interrupt mask.

( *(cc2538_reg_t*)0x4000c038 )

UART0_RIS

UART0 raw interrupt status.

( *(cc2538_reg_t*)0x4000c03c )

UART0_MIS

UART0 masked interrupt status.

( *(cc2538_reg_t*)0x4000c040 )

UART0_ICR

UART0 interrupt clear.

( *(cc2538_reg_t*)0x4000c044 )

UART0_DMACTL

UART0 DMA control.

( *(cc2538_reg_t*)0x4000c048 )

UART0_LCTL

UART0 LIN control.

( *(cc2538_reg_t*)0x4000c090 )

UART0_LSS

UART0 LIN snap shot.

( *(cc2538_reg_t*)0x4000c094 )

UART0_LTIM

UART0 LIN timer.

( *(cc2538_reg_t*)0x4000c098 )

UART0_NINEBITADDR

UART0 9-bit self address.

( *(cc2538_reg_t*)0x4000c0a4 )

UART0_NINEBITAMASK

UART0 9-bit self address mask.

( *(cc2538_reg_t*)0x4000c0a8 )

UART0_PP

UART0 peripheral properties.

( *(cc2538_reg_t*)0x4000cfc0 )

UART0_CC

UART0 clock configuration.

( *(cc2538_reg_t*)0x4000cfc8 )

UART1_DR

UART1 Data Register.

( *(cc2538_reg_t*)0x4000d000 )

UART1_ECR

UART1 receive status and error clear.

( *(cc2538_reg_t*)0x4000d004 )

UART1_RSR

UART1 receive status and error clear.

( *(cc2538_reg_t*)0x4000d004 )

UART1_FR

UART1 flag.

( *(cc2538_reg_t*)0x4000d018 )

UART1_ILPR

UART1 IrDA low-power register.

( *(cc2538_reg_t*)0x4000d020 )

UART1_IBRD

UART1 integer baud-rate divisor.

( *(cc2538_reg_t*)0x4000d024 )

UART1_FBRD

UART1 fractional baud-rate divisor.

( *(cc2538_reg_t*)0x4000d028 )

UART1_LCRH

UART1 line control.

( *(cc2538_reg_t*)0x4000d02c )

UART1_CTL

UART1 control.

( *(cc2538_reg_t*)0x4000d030 )

UART1_IFLS

UART1 interrupt FIFO level select.

( *(cc2538_reg_t*)0x4000d034 )

UART1_IM

UART1 interrupt mask.

( *(cc2538_reg_t*)0x4000d038 )

UART1_RIS

UART1 raw interrupt status.

( *(cc2538_reg_t*)0x4000d03c )

UART1_MIS

UART1 masked interrupt status.

( *(cc2538_reg_t*)0x4000d040 )

UART1_ICR

UART1 interrupt clear.

( *(cc2538_reg_t*)0x4000d044 )

UART1_DMACTL

UART1 DMA control.

( *(cc2538_reg_t*)0x4000d048 )

UART1_LCTL

UART1 LIN control.

( *(cc2538_reg_t*)0x4000d090 )

UART1_LSS

UART1 LIN snap shot.

( *(cc2538_reg_t*)0x4000d094 )

UART1_LTIM

UART1 LIN timer.

( *(cc2538_reg_t*)0x4000d098 )

UART1_NINEBITADDR

UART1 9-bit self address.

( *(cc2538_reg_t*)0x4000d0a4 )

UART1_NINEBITAMASK

UART1 9-bit self address mask.

( *(cc2538_reg_t*)0x4000d0a8 )

UART1_PP

UART1 peripheral properties.

( *(cc2538_reg_t*)0x4000dfc0 )

UART1_CC

UART1 clock configuration.

( *(cc2538_reg_t*)0x4000dfc8 )

I2CM_SA

I2C Master Slave address.

( *(cc2538_reg_t*)0x40020000 )

I2CM_CTRL

I2C Master Control and status.

( *(cc2538_reg_t*)0x40020004 )

I2CM_STAT

I2C Master Control and status.

( *(cc2538_reg_t*)0x40020004 )

I2CM_DR

I2C Master Data.

( *(cc2538_reg_t*)0x40020008 )

I2CM_TPR

I2C Master Timer period.

( *(cc2538_reg_t*)0x4002000c )

I2CM_IMR

I2C Master Interrupt mask.

( *(cc2538_reg_t*)0x40020010 )

I2CM_RIS

I2C Master Raw interrupt status.

( *(cc2538_reg_t*)0x40020014 )

I2CM_MIS

I2C Master Masked interrupt status.

( *(cc2538_reg_t*)0x40020018 )

I2CM_ICR

I2C Master Interrupt clear.

( *(cc2538_reg_t*)0x4002001c )

I2CM_CR

I2C Master Configuration.

( *(cc2538_reg_t*)0x40020020 )

I2CS_OAR

I2C Slave own address.

( *(cc2538_reg_t*)0x40020800 )

I2CS_CTRL

I2C Slave Control and status.

( *(cc2538_reg_t*)0x40020804 )

I2CS_STAT

I2C Slave Control and status.

( *(cc2538_reg_t*)0x40020804 )

I2CS_DR

I2C Slave Data.

( *(cc2538_reg_t*)0x40020808 )

I2CS_IMR

I2C Slave Interrupt mask.

( *(cc2538_reg_t*)0x4002080c )

I2CS_RIS

I2C Slave Raw interrupt status.

( *(cc2538_reg_t*)0x40020810 )

I2CS_MIS

I2C Slave Masked interrupt status.

( *(cc2538_reg_t*)0x40020814 )

I2CS_ICR

I2C Slave Interrupt clear.

( *(cc2538_reg_t*)0x40020818 )

GPTIMER0_CFG

GPTM0 configuration.

( *(cc2538_reg_t*)0x40030000 )

GPTIMER0_TAMR

GPTM0 Timer A mode.

( *(cc2538_reg_t*)0x40030004 )

GPTIMER0_TBMR

GPTM0 Timer B mode.

( *(cc2538_reg_t*)0x40030008 )

GPTIMER0_CTL

GPTM0 control.

( *(cc2538_reg_t*)0x4003000c )

GPTIMER0_SYNC

GPTM0 synchronize.

( *(cc2538_reg_t*)0x40030010 )

GPTIMER0_IMR

GPTM0 interrupt mask.

( *(cc2538_reg_t*)0x40030018 )

GPTIMER0_RIS

GPTM0 raw interrupt status.

( *(cc2538_reg_t*)0x4003001c )

GPTIMER0_MIS

GPTM0 masked interrupt status.

( *(cc2538_reg_t*)0x40030020 )

GPTIMER0_ICR

GPTM0 interrupt clear.

( *(cc2538_reg_t*)0x40030024 )

GPTIMER0_TAILR

GPTM0 Timer A interval load.

( *(cc2538_reg_t*)0x40030028 )

GPTIMER0_TBILR

GPTM0 Timer B interval load.

( *(cc2538_reg_t*)0x4003002c )

GPTIMER0_TAMATCHR

GPTM0 Timer A match.

( *(cc2538_reg_t*)0x40030030 )

GPTIMER0_TBMATCHR

GPTM0 Timer B match.

( *(cc2538_reg_t*)0x40030034 )

GPTIMER0_TAPR

GPTM0 Timer A prescale.

( *(cc2538_reg_t*)0x40030038 )

GPTIMER0_TBPR

GPTM0 Timer B prescale.

( *(cc2538_reg_t*)0x4003003c )

GPTIMER0_TAPMR

GPTM0 Timer A prescale match.

( *(cc2538_reg_t*)0x40030040 )

GPTIMER0_TBPMR

GPTM0 Timer B prescale match.

( *(cc2538_reg_t*)0x40030044 )

GPTIMER0_TAR

GPTM0 Timer A.

( *(cc2538_reg_t*)0x40030048 )

GPTIMER0_TBR

GPTM0 Timer B.

( *(cc2538_reg_t*)0x4003004c )

GPTIMER0_TAV

GPTM0 Timer A value.

( *(cc2538_reg_t*)0x40030050 )

GPTIMER0_TBV

GPTM0 Timer B value.

( *(cc2538_reg_t*)0x40030054 )

GPTIMER0_TAPS

GPTM0 Timer A prescale snapshot.

( *(cc2538_reg_t*)0x4003005c )

GPTIMER0_TBPS

GPTM0 Timer B prescale snapshot.

( *(cc2538_reg_t*)0x40030060 )

GPTIMER0_TAPV

GPTM0 Timer A prescale value.

( *(cc2538_reg_t*)0x40030064 )

GPTIMER0_TBPV

GPTM0 Timer B prescale value.

( *(cc2538_reg_t*)0x40030068 )

GPTIMER0_PP

GPTM0 peripheral properties.

( *(cc2538_reg_t*)0x40030fc0 )

GPTIMER1_CFG

GPTM1 configuration.

( *(cc2538_reg_t*)0x40031000 )

GPTIMER1_TAMR

GPTM1 Timer A mode.

( *(cc2538_reg_t*)0x40031004 )

GPTIMER1_TBMR

GPTM1 Timer B mode.

( *(cc2538_reg_t*)0x40031008 )

GPTIMER1_CTL

GPTM1 control.

( *(cc2538_reg_t*)0x4003100c )

GPTIMER1_SYNC

GPTM1 synchronize.

( *(cc2538_reg_t*)0x40031010 )

GPTIMER1_IMR

GPTM1 interrupt mask.

( *(cc2538_reg_t*)0x40031018 )

GPTIMER1_RIS

GPTM1 raw interrupt status.

( *(cc2538_reg_t*)0x4003101c )

GPTIMER1_MIS

GPTM1 masked interrupt status.

( *(cc2538_reg_t*)0x40031020 )

GPTIMER1_ICR

GPTM1 interrupt clear.

( *(cc2538_reg_t*)0x40031024 )

GPTIMER1_TAILR

GPTM1 Timer A interval load.

( *(cc2538_reg_t*)0x40031028 )

GPTIMER1_TBILR

GPTM1 Timer B interval load.

( *(cc2538_reg_t*)0x4003102c )

GPTIMER1_TAMATCHR

GPTM1 Timer A match.

( *(cc2538_reg_t*)0x40031030 )

GPTIMER1_TBMATCHR

GPTM1 Timer B match.

( *(cc2538_reg_t*)0x40031034 )

GPTIMER1_TAPR

GPTM1 Timer A prescale.

( *(cc2538_reg_t*)0x40031038 )

GPTIMER1_TBPR

GPTM1 Timer B prescale.

( *(cc2538_reg_t*)0x4003103c )

GPTIMER1_TAPMR

GPTM1 Timer A prescale match.

( *(cc2538_reg_t*)0x40031040 )

GPTIMER1_TBPMR

GPTM1 Timer B prescale match.

( *(cc2538_reg_t*)0x40031044 )

GPTIMER1_TAR

GPTM1 Timer A.

( *(cc2538_reg_t*)0x40031048 )

GPTIMER1_TBR

GPTM1 Timer B.

( *(cc2538_reg_t*)0x4003104c )

GPTIMER1_TAV

GPTM1 Timer A value.

( *(cc2538_reg_t*)0x40031050 )

GPTIMER1_TBV

GPTM1 Timer B value.

( *(cc2538_reg_t*)0x40031054 )

GPTIMER1_TAPS

GPTM1 Timer A prescale snapshot.

( *(cc2538_reg_t*)0x4003105c )

GPTIMER1_TBPS

GPTM1 Timer B prescale snapshot.

( *(cc2538_reg_t*)0x40031060 )

GPTIMER1_TAPV

GPTM1 Timer A prescale value.

( *(cc2538_reg_t*)0x40031064 )

GPTIMER1_TBPV

GPTM1 Timer B prescale value.

( *(cc2538_reg_t*)0x40031068 )

GPTIMER1_PP

GPTM1 peripheral properties.

( *(cc2538_reg_t*)0x40031fc0 )

GPTIMER2_CFG

GPTM2 configuration.

( *(cc2538_reg_t*)0x40032000 )

GPTIMER2_TAMR

GPTM2 Timer A mode.

( *(cc2538_reg_t*)0x40032004 )

GPTIMER2_TBMR

GPTM2 Timer B mode.

( *(cc2538_reg_t*)0x40032008 )

GPTIMER2_CTL

GPTM2 control.

( *(cc2538_reg_t*)0x4003200c )

GPTIMER2_SYNC

GPTM2 synchronize.

( *(cc2538_reg_t*)0x40032010 )

GPTIMER2_IMR

GPTM2 interrupt mask.

( *(cc2538_reg_t*)0x40032018 )

GPTIMER2_RIS

GPTM2 raw interrupt status.

( *(cc2538_reg_t*)0x4003201c )

GPTIMER2_MIS

GPTM2 masked interrupt status.

( *(cc2538_reg_t*)0x40032020 )

GPTIMER2_ICR

GPTM2 interrupt clear.

( *(cc2538_reg_t*)0x40032024 )

GPTIMER2_TAILR

GPTM2 Timer A interval load.

( *(cc2538_reg_t*)0x40032028 )

GPTIMER2_TBILR

GPTM2 Timer B interval load.

( *(cc2538_reg_t*)0x4003202c )

GPTIMER2_TAMATCHR

GPTM2 Timer A match.

( *(cc2538_reg_t*)0x40032030 )

GPTIMER2_TBMATCHR

GPTM2 Timer B match.

( *(cc2538_reg_t*)0x40032034 )

GPTIMER2_TAPR

GPTM2 Timer A prescale.

( *(cc2538_reg_t*)0x40032038 )

GPTIMER2_TBPR

GPTM2 Timer B prescale.

( *(cc2538_reg_t*)0x4003203c )

GPTIMER2_TAPMR

GPTM2 Timer A prescale match.

( *(cc2538_reg_t*)0x40032040 )

GPTIMER2_TBPMR

GPTM2 Timer B prescale match.

( *(cc2538_reg_t*)0x40032044 )

GPTIMER2_TAR

GPTM2 Timer A.

( *(cc2538_reg_t*)0x40032048 )

GPTIMER2_TBR

GPTM2 Timer B.

( *(cc2538_reg_t*)0x4003204c )

GPTIMER2_TAV

GPTM2 Timer A value.

( *(cc2538_reg_t*)0x40032050 )

GPTIMER2_TBV

GPTM2 Timer B value.

( *(cc2538_reg_t*)0x40032054 )

GPTIMER2_TAPS

GPTM2 Timer A prescale snapshot.

( *(cc2538_reg_t*)0x4003205c )

GPTIMER2_TBPS

GPTM2 Timer B prescale snapshot.

( *(cc2538_reg_t*)0x40032060 )

GPTIMER2_TAPV

GPTM2 Timer A prescale value.

( *(cc2538_reg_t*)0x40032064 )

GPTIMER2_TBPV

GPTM2 Timer B prescale value.

( *(cc2538_reg_t*)0x40032068 )

GPTIMER2_PP

GPTM2 peripheral properties.

( *(cc2538_reg_t*)0x40032fc0 )

GPTIMER3_CFG

GPTM3 configuration.

( *(cc2538_reg_t*)0x40033000 )

GPTIMER3_TAMR

GPTM3 Timer A mode.

( *(cc2538_reg_t*)0x40033004 )

GPTIMER3_TBMR

GPTM3 Timer B mode.

( *(cc2538_reg_t*)0x40033008 )

GPTIMER3_CTL

GPTM3 control.

( *(cc2538_reg_t*)0x4003300c )

GPTIMER3_SYNC

GPTM3 synchronize.

( *(cc2538_reg_t*)0x40033010 )

GPTIMER3_IMR

GPTM3 interrupt mask.

( *(cc2538_reg_t*)0x40033018 )

GPTIMER3_RIS

GPTM3 raw interrupt status.

( *(cc2538_reg_t*)0x4003301c )

GPTIMER3_MIS

GPTM3 masked interrupt status.

( *(cc2538_reg_t*)0x40033020 )

GPTIMER3_ICR

GPTM3 interrupt clear.

( *(cc2538_reg_t*)0x40033024 )

GPTIMER3_TAILR

GPTM3 Timer A interval load.

( *(cc2538_reg_t*)0x40033028 )

GPTIMER3_TBILR

GPTM3 Timer B interval load.

( *(cc2538_reg_t*)0x4003302c )

GPTIMER3_TAMATCHR

GPTM3 Timer A match.

( *(cc2538_reg_t*)0x40033030 )

GPTIMER3_TBMATCHR

GPTM3 Timer B match.

( *(cc2538_reg_t*)0x40033034 )

GPTIMER3_TAPR

GPTM3 Timer A prescale.

( *(cc2538_reg_t*)0x40033038 )

GPTIMER3_TBPR

GPTM3 Timer B prescale.

( *(cc2538_reg_t*)0x4003303c )

GPTIMER3_TAPMR

GPTM3 Timer A prescale match.

( *(cc2538_reg_t*)0x40033040 )

GPTIMER3_TBPMR

GPTM3 Timer B prescale match.

( *(cc2538_reg_t*)0x40033044 )

GPTIMER3_TAR

GPTM3 Timer A.

( *(cc2538_reg_t*)0x40033048 )

GPTIMER3_TBR

GPTM3 Timer B.

( *(cc2538_reg_t*)0x4003304c )

GPTIMER3_TAV

GPTM3 Timer A value.

( *(cc2538_reg_t*)0x40033050 )

GPTIMER3_TBV

GPTM3 Timer B value.

( *(cc2538_reg_t*)0x40033054 )

GPTIMER3_TAPS

GPTM3 Timer A prescale snapshot.

( *(cc2538_reg_t*)0x4003305c )

GPTIMER3_TBPS

GPTM3 Timer B prescale snapshot.

( *(cc2538_reg_t*)0x40033060 )

GPTIMER3_TAPV

GPTM3 Timer A prescale value.

( *(cc2538_reg_t*)0x40033064 )

GPTIMER3_TBPV

GPTM3 Timer B prescale value.

( *(cc2538_reg_t*)0x40033068 )

GPTIMER3_PP

GPTM3 peripheral properties.

( *(cc2538_reg_t*)0x40033fc0 )

RFCORE_FFSM_SRCRESMASK0

RF Source address matching result.

( *(cc2538_reg_t*)0x40088580 )

RFCORE_FFSM_SRCRESMASK1

RF Source address matching result.

( *(cc2538_reg_t*)0x40088584 )

RFCORE_FFSM_SRCRESMASK2

RF Source address matching result.

( *(cc2538_reg_t*)0x40088588 )

RFCORE_FFSM_SRCRESINDEX

RF Source address matching result.

( *(cc2538_reg_t*)0x4008858c )

RFCORE_FFSM_SRCEXTPENDEN0

RF Source address matching control.

( *(cc2538_reg_t*)0x40088590 )

RFCORE_FFSM_SRCEXTPENDEN1

RF Source address matching control.

( *(cc2538_reg_t*)0x40088594 )

RFCORE_FFSM_SRCEXTPENDEN2

RF Source address matching control.

( *(cc2538_reg_t*)0x40088598 )

RFCORE_FFSM_SRCSHORTPENDEN0

RF Source address matching control.

( *(cc2538_reg_t*)0x4008859c )

RFCORE_FFSM_SRCSHORTPENDEN1

RF Source address matching control.

( *(cc2538_reg_t*)0x400885a0 )

RFCORE_FFSM_SRCSHORTPENDEN2

RF Source address matching control.

( *(cc2538_reg_t*)0x400885a4 )

RFCORE_FFSM_EXT_ADDR0

RF Local address information.

( *(cc2538_reg_t*)0x400885a8 )

RFCORE_FFSM_EXT_ADDR1

RF Local address information.

( *(cc2538_reg_t*)0x400885ac )

RFCORE_FFSM_EXT_ADDR2

RF Local address information.

( *(cc2538_reg_t*)0x400885b0 )

RFCORE_FFSM_EXT_ADDR3

RF Local address information.

( *(cc2538_reg_t*)0x400885b4 )

RFCORE_FFSM_EXT_ADDR4

RF Local address information.

( *(cc2538_reg_t*)0x400885b8 )

RFCORE_FFSM_EXT_ADDR5

RF Local address information.

( *(cc2538_reg_t*)0x400885bc )

RFCORE_FFSM_EXT_ADDR6

RF Local address information.

( *(cc2538_reg_t*)0x400885c0 )

RFCORE_FFSM_EXT_ADDR7

RF Local address information.

( *(cc2538_reg_t*)0x400885c4 )

RFCORE_FFSM_PAN_ID0

RF Local address information.

( *(cc2538_reg_t*)0x400885c8 )

RFCORE_FFSM_PAN_ID1

RF Local address information.

( *(cc2538_reg_t*)0x400885cc )

RFCORE_FFSM_SHORT_ADDR0

RF Local address information.

( *(cc2538_reg_t*)0x400885d0 )

RFCORE_FFSM_SHORT_ADDR1

RF Local address information.

( *(cc2538_reg_t*)0x400885d4 )

RFCORE_XREG_FRMFILT0

RF Frame Filter 0.

( *(cc2538_reg_t*)0x40088600 )

RFCORE_XREG_FRMFILT1

RF Frame Filter 1.

( *(cc2538_reg_t*)0x40088604 )

RFCORE_XREG_SRCMATCH

RF Source address matching and pending bits.

( *(cc2538_reg_t*)0x40088608 )

RFCORE_XREG_SRCSHORTEN0

RF Short address matching.

( *(cc2538_reg_t*)0x4008860c )

RFCORE_XREG_SRCSHORTEN1

RF Short address matching.

( *(cc2538_reg_t*)0x40088610 )

RFCORE_XREG_SRCSHORTEN2

RF Short address matching.

( *(cc2538_reg_t*)0x40088614 )

RFCORE_XREG_SRCEXTEN0

RF Extended address matching.

( *(cc2538_reg_t*)0x40088618 )

RFCORE_XREG_SRCEXTEN1

RF Extended address matching.

( *(cc2538_reg_t*)0x4008861c )

RFCORE_XREG_SRCEXTEN2

RF Extended address matching.

( *(cc2538_reg_t*)0x40088620 )

RFCORE_XREG_FRMCTRL0

RF Frame handling.

( *(cc2538_reg_t*)0x40088624 )

RFCORE_XREG_FRMCTRL1

RF Frame handling.

( *(cc2538_reg_t*)0x40088628 )

RFCORE_XREG_RXENABLE

RF RX enabling.

( *(cc2538_reg_t*)0x4008862c )

RFCORE_XREG_RXMASKSET

RF RX enabling.

( *(cc2538_reg_t*)0x40088630 )

RFCORE_XREG_RXMASKCLR

RF RX disabling.

( *(cc2538_reg_t*)0x40088634 )

RFCORE_XREG_FREQTUNE

RF Crystal oscillator frequency tuning.

( *(cc2538_reg_t*)0x40088638 )

RFCORE_XREG_FREQCTRL

RF Controls the RF frequency.

( *(cc2538_reg_t*)0x4008863c )

RFCORE_XREG_TXPOWER

RF Controls the output power.

( *(cc2538_reg_t*)0x40088640 )

RFCORE_XREG_TXCTRL

RF Controls the TX settings.

( *(cc2538_reg_t*)0x40088644 )

RFCORE_XREG_FSMSTAT0

RF Radio status register.

( *(cc2538_reg_t*)0x40088648 )

RFCORE_XREG_FSMSTAT1

RF Radio status register.

( *(cc2538_reg_t*)0x4008864c )

RFCORE_XREG_FIFOPCTRL

RF FIFOP threshold.

( *(cc2538_reg_t*)0x40088650 )

RFCORE_XREG_FSMCTRL

RF FSM options.

( *(cc2538_reg_t*)0x40088654 )

RFCORE_XREG_CCACTRL0

RF CCA threshold.

( *(cc2538_reg_t*)0x40088658 )

RFCORE_XREG_CCACTRL1

RF Other CCA Options.

( *(cc2538_reg_t*)0x4008865c )

RFCORE_XREG_RSSI

RF RSSI status register.

( *(cc2538_reg_t*)0x40088660 )

RFCORE_XREG_RSSISTAT

RF RSSI valid status register.

( *(cc2538_reg_t*)0x40088664 )

RFCORE_XREG_RXFIRST

RF First byte in RX FIFO.

( *(cc2538_reg_t*)0x40088668 )

RFCORE_XREG_RXFIFOCNT

RF Number of bytes in RX FIFO.

( *(cc2538_reg_t*)0x4008866c )

RFCORE_XREG_TXFIFOCNT

RF Number of bytes in TX FIFO.

( *(cc2538_reg_t*)0x40088670 )

RFCORE_XREG_RXFIRST_PTR

RF RX FIFO pointer.

( *(cc2538_reg_t*)0x40088674 )

RFCORE_XREG_RXLAST_PTR

RF RX FIFO pointer.

( *(cc2538_reg_t*)0x40088678 )

RFCORE_XREG_RXP1_PTR

RF RX FIFO pointer.

( *(cc2538_reg_t*)0x4008867c )

RFCORE_XREG_TXFIRST_PTR

RF TX FIFO pointer.

( *(cc2538_reg_t*)0x40088684 )

RFCORE_XREG_TXLAST_PTR

RF TX FIFO pointer.

( *(cc2538_reg_t*)0x40088688 )

RFCORE_XREG_RFIRQM0

RF interrupt masks.

( *(cc2538_reg_t*)0x4008868c )

RFCORE_XREG_RFIRQM1

RF interrupt masks.

( *(cc2538_reg_t*)0x40088690 )

RFCORE_XREG_RFERRM

RF error interrupt mask.

( *(cc2538_reg_t*)0x40088694 )

RFCORE_XREG_RFRND

RF Random data.

( *(cc2538_reg_t*)0x4008869c )

RFCORE_XREG_MDMCTRL0

RF Controls modem.

( *(cc2538_reg_t*)0x400886a0 )

RFCORE_XREG_MDMCTRL1

RF Controls modem.

( *(cc2538_reg_t*)0x400886a4 )

RFCORE_XREG_FREQEST

RF Estimated RF frequency offset.

( *(cc2538_reg_t*)0x400886a8 )

RFCORE_XREG_RXCTRL

RF Tune receive section.

( *(cc2538_reg_t*)0x400886ac )

RFCORE_XREG_FSCTRL

RF Tune frequency synthesizer.

( *(cc2538_reg_t*)0x400886b0 )

RFCORE_XREG_FSCAL0

RF Tune frequency calibration.

( *(cc2538_reg_t*)0x400886b4 )

RFCORE_XREG_FSCAL1

RF Tune frequency calibration.

( *(cc2538_reg_t*)0x400886b8 )

RFCORE_XREG_FSCAL2

RF Tune frequency calibration.

( *(cc2538_reg_t*)0x400886bc )

RFCORE_XREG_FSCAL3

RF Tune frequency calibration.

( *(cc2538_reg_t*)0x400886c0 )

RFCORE_XREG_AGCCTRL0

RF AGC dynamic range control.

( *(cc2538_reg_t*)0x400886c4 )

RFCORE_XREG_AGCCTRL1

RF AGC reference level.

( *(cc2538_reg_t*)0x400886c8 )

RFCORE_XREG_AGCCTRL2

RF AGC gain override.

( *(cc2538_reg_t*)0x400886cc )

RFCORE_XREG_AGCCTRL3

RF AGC control.

( *(cc2538_reg_t*)0x400886d0 )

RFCORE_XREG_ADCTEST0

RF ADC tuning.

( *(cc2538_reg_t*)0x400886d4 )

RFCORE_XREG_ADCTEST1

RF ADC tuning.

( *(cc2538_reg_t*)0x400886d8 )

RFCORE_XREG_ADCTEST2

RF ADC tuning.

( *(cc2538_reg_t*)0x400886dc )

RFCORE_XREG_MDMTEST0

RF Test register for modem.

( *(cc2538_reg_t*)0x400886e0 )

RFCORE_XREG_MDMTEST1

RF Test Register for Modem.

( *(cc2538_reg_t*)0x400886e4 )

RFCORE_XREG_DACTEST0

RF DAC override value.

( *(cc2538_reg_t*)0x400886e8 )

RFCORE_XREG_DACTEST1

RF DAC override value.

( *(cc2538_reg_t*)0x400886ec )

RFCORE_XREG_DACTEST2

RF DAC test setting.

( *(cc2538_reg_t*)0x400886f0 )

RFCORE_XREG_ATEST

RF Analog test control.

( *(cc2538_reg_t*)0x400886f4 )

RFCORE_XREG_PTEST0

RF Override power-down register.

( *(cc2538_reg_t*)0x400886f8 )

RFCORE_XREG_PTEST1

RF Override power-down register.

( *(cc2538_reg_t*)0x400886fc )

RFCORE_XREG_CSPCTRL

RF CSP control bit.

( *(cc2538_reg_t*)0x40088780 )

RFCORE_XREG_CSPSTAT

RF CSP status register.

( *(cc2538_reg_t*)0x40088784 )

RFCORE_XREG_CSPX

RF CSP X data register.

( *(cc2538_reg_t*)0x40088788 )

RFCORE_XREG_CSPY

RF CSP Y data register.

( *(cc2538_reg_t*)0x4008878c )

RFCORE_XREG_CSPZ

RF CSP Z data register.

( *(cc2538_reg_t*)0x40088790 )

RFCORE_XREG_CSPT

RF CSP T data register.

( *(cc2538_reg_t*)0x40088794 )

RFCORE_XREG_RFC_OBS_CTRL0

RF observation mux control.

( *(cc2538_reg_t*)0x400887ac )

RFCORE_XREG_RFC_OBS_CTRL1

RF observation mux control.

( *(cc2538_reg_t*)0x400887b0 )

RFCORE_XREG_RFC_OBS_CTRL2

RF observation mux control.

( *(cc2538_reg_t*)0x400887b4 )

RFCORE_XREG_TXFILTCFG

RF TX filter configuration.

( *(cc2538_reg_t*)0x400887e8 )

RFCORE_SFR_MTCSPCFG

RF MAC Timer event configuration.

( *(cc2538_reg_t*)0x40088800 )

RFCORE_SFR_MTCTRL

RF MAC Timer control register.

( *(cc2538_reg_t*)0x40088804 )

RFCORE_SFR_MTIRQM

RF MAC Timer interrupt mask.

( *(cc2538_reg_t*)0x40088808 )

RFCORE_SFR_MTIRQF

RF MAC Timer interrupt flags.

( *(cc2538_reg_t*)0x4008880c )

RFCORE_SFR_MTMSEL

RF MAC Timer multiplex select.

( *(cc2538_reg_t*)0x40088810 )

RFCORE_SFR_MTM0

RF MAC Timer multiplexed register 0.

( *(cc2538_reg_t*)0x40088814 )

RFCORE_SFR_MTM1

RF MAC Timer multiplexed register 1.

( *(cc2538_reg_t*)0x40088818 )

RFCORE_SFR_MTMOVF2

RF MAC Timer multiplexed overflow register 2.

( *(cc2538_reg_t*)0x4008881c )

RFCORE_SFR_MTMOVF1

RF MAC Timer multiplexed overflow register 1.

( *(cc2538_reg_t*)0x40088820 )

RFCORE_SFR_MTMOVF0

RF MAC Timer multiplexed overflow register 0.

( *(cc2538_reg_t*)0x40088824 )

RFCORE_SFR_RFDATA

RF Tx/Rx FIFO.

( *(cc2538_reg_t*)0x40088828 )

RFCORE_SFR_RFERRF

RF error interrupt flags.

( *(cc2538_reg_t*)0x4008882c )

RFCORE_SFR_RFIRQF1

RF interrupt flags.

( *(cc2538_reg_t*)0x40088830 )

RFCORE_SFR_RFIRQF0

RF interrupt flags.

( *(cc2538_reg_t*)0x40088834 )

RFCORE_SFR_RFST

RF CSMA-CA/strobe processor.

( *(cc2538_reg_t*)0x40088838 )

USB_ADDR

USB Function address.

( *(cc2538_reg_t*)0x40089000 )

USB_POW

USB Power management and control register.

( *(cc2538_reg_t*)0x40089004 )

USB_IIF

USB Interrupt flags for endpoint 0 and IN endpoints 1-5.

( *(cc2538_reg_t*)0x40089008 )

USB_OIF

USB Interrupt flags for OUT endpoints 1-5.

( *(cc2538_reg_t*)0x40089010 )

USB_CIF

USB Common USB interrupt flags.

( *(cc2538_reg_t*)0x40089018 )

USB_IIE

USB Interrupt enable mask for IN endpoints 1-5 and endpoint 0.

( *(cc2538_reg_t*)0x4008901c )

USB_OIE

USB Interrupt enable mask for OUT endpoints 1-5.

( *(cc2538_reg_t*)0x40089024 )

USB_CIE

USB Common USB interrupt enable mask.

( *(cc2538_reg_t*)0x4008902c )

USB_FRML

USB Frame number (low byte)

( *(cc2538_reg_t*)0x40089030 )

USB_FRMH

USB Frame number (high byte)

( *(cc2538_reg_t*)0x40089034 )

USB_INDEX

USB Index register for selecting the endpoint status and control registers.

( *(cc2538_reg_t*)0x40089038 )

USB_CTRL

USB USB peripheral control register.

( *(cc2538_reg_t*)0x4008903c )

USB_MAXI

USB Indexed register:

( *(cc2538_reg_t*)0x40089040 )

USB_CS0_CSIL

USB Indexed register:

( *(cc2538_reg_t*)0x40089044 )

USB_CSIH

USB Indexed register:

( *(cc2538_reg_t*)0x40089048 )

USB_MAXO

USB Indexed register:

( *(cc2538_reg_t*)0x4008904c )

USB_CSOL

USB Indexed register:

( *(cc2538_reg_t*)0x40089050 )

USB_CSOH

USB Indexed register:

( *(cc2538_reg_t*)0x40089054 )

USB_CNT0_CNTL

USB Indexed register:

( *(cc2538_reg_t*)0x40089058 )

USB_CNTH

USB Indexed register:

( *(cc2538_reg_t*)0x4008905c )

USB_F0

USB Endpoint 0 FIFO.

( *(cc2538_reg_t*)0x40089080 )

USB_F1

USB IN/OUT endpoint 1 FIFO.

( *(cc2538_reg_t*)0x40089088 )

USB_F2

USB IN/OUT endpoint 2 FIFO.

( *(cc2538_reg_t*)0x40089090 )

USB_F3

USB IN/OUT endpoint 3 FIFO.

( *(cc2538_reg_t*)0x40089098 )

USB_F4

USB IN/OUT endpoint 4 FIFO.

( *(cc2538_reg_t*)0x400890a0 )

USB_F5

USB IN/OUT endpoint 5 FIFO.

( *(cc2538_reg_t*)0x400890a8 )

AES_DMAC_CH0_CTRL

AES Channel control.

( *(cc2538_reg_t*)0x4008b000 )

AES_DMAC_CH0_EXTADDR

AES Channel external address.

( *(cc2538_reg_t*)0x4008b004 )

AES_DMAC_CH0_DMALENGTH

AES Channel DMA length.

( *(cc2538_reg_t*)0x4008b00c )

AES_DMAC_STATUS

AES DMAC status.

( *(cc2538_reg_t*)0x4008b018 )

AES_DMAC_SWRES

AES DMAC software reset register.

( *(cc2538_reg_t*)0x4008b01c )

AES_DMAC_CH1_CTRL

AES Channel control.

( *(cc2538_reg_t*)0x4008b020 )

AES_DMAC_CH1_EXTADDR

AES Channel external address.

( *(cc2538_reg_t*)0x4008b024 )

AES_DMAC_CH1_DMALENGTH

AES Channel DMA length.

( *(cc2538_reg_t*)0x4008b02c )

AES_DMAC_MST_RUNPARAMS

AES DMAC master run-time parameters.

( *(cc2538_reg_t*)0x4008b078 )

AES_DMAC_PERSR

AES DMAC port error raw status register.

( *(cc2538_reg_t*)0x4008b07c )

AES_DMAC_OPTIONS

AES DMAC options register.

( *(cc2538_reg_t*)0x4008b0f8 )

AES_DMAC_VERSION

AES DMAC version register.

( *(cc2538_reg_t*)0x4008b0fc )

AES_KEY_STORE_WRITE_AREA

AES Key store write area register.

( *(cc2538_reg_t*)0x4008b400 )

AES_KEY_STORE_WRITTEN_AREA

AES Key store written area register.

( *(cc2538_reg_t*)0x4008b404 )

AES_KEY_STORE_SIZE

AES Key store size register.

( *(cc2538_reg_t*)0x4008b408 )

AES_KEY_STORE_READ_AREA

AES Key store read area register.

( *(cc2538_reg_t*)0x4008b40c )

AES_AES_KEY2_0

AES_KEY2_0 / AES_GHASH_H_IN_0.

( *(cc2538_reg_t*)0x4008b500 )

AES_AES_KEY2_1

AES_KEY2_1 / AES_GHASH_H_IN_1.

( *(cc2538_reg_t*)0x4008b504 )

AES_AES_KEY2_2

AES_KEY2_2 / AES_GHASH_H_IN_2.

( *(cc2538_reg_t*)0x4008b508 )

AES_AES_KEY2_3

AES_KEY2_3 / AES_GHASH_H_IN_3.

( *(cc2538_reg_t*)0x4008b50c )

AES_AES_KEY3_0

AES_KEY3_0 / AES_KEY2_4.

( *(cc2538_reg_t*)0x4008b510 )

AES_AES_KEY3_1

AES_KEY3_1 / AES_KEY2_5.

( *(cc2538_reg_t*)0x4008b514 )

AES_AES_KEY3_2

AES_KEY3_2 / AES_KEY2_6.

( *(cc2538_reg_t*)0x4008b518 )

AES_AES_KEY3_3

AES_KEY3_3 / AES_KEY2_7.

( *(cc2538_reg_t*)0x4008b51c )

AES_AES_IV_0

AES initialization vector registers.

( *(cc2538_reg_t*)0x4008b540 )

AES_AES_IV_1

AES initialization vector registers.

( *(cc2538_reg_t*)0x4008b544 )

AES_AES_IV_2

AES initialization vector registers.

( *(cc2538_reg_t*)0x4008b548 )

AES_AES_IV_3

AES initialization vector registers.

( *(cc2538_reg_t*)0x4008b54c )

AES_AES_CTRL

AES input/output buffer control and mode register.

( *(cc2538_reg_t*)0x4008b550 )

AES_AES_C_LENGTH_0

AES crypto length registers (LSW)

( *(cc2538_reg_t*)0x4008b554 )

AES_AES_C_LENGTH_1

AES crypto length registers (MSW)

( *(cc2538_reg_t*)0x4008b558 )

AES_AES_AUTH_LENGTH

AES Authentication length register.

( *(cc2538_reg_t*)0x4008b55c )

AES_AES_DATA_IN_OUT_0

AES Data input/output registers.

( *(cc2538_reg_t*)0x4008b560 )

AES_AES_DATA_IN_OUT_1

AES Data Input/Output Registers.

( *(cc2538_reg_t*)0x4008b564 )

AES_AES_DATA_IN_OUT_2

AES Data Input/Output Registers.

( *(cc2538_reg_t*)0x4008b568 )

AES_AES_DATA_IN_OUT_3

AES Data Input/Output Registers.

( *(cc2538_reg_t*)0x4008b56c )

AES_AES_TAG_OUT_0

AES TAG register 0.

( *(cc2538_reg_t*)0x4008b570 )

AES_AES_TAG_OUT_1

AES TAG register 1.

( *(cc2538_reg_t*)0x4008b574 )

AES_AES_TAG_OUT_2

AES TAG register 2.

( *(cc2538_reg_t*)0x4008b578 )

AES_AES_TAG_OUT_3

AES TAG register 3.

( *(cc2538_reg_t*)0x4008b57c )

AES_HASH_DATA_IN_0

AES HASH data input register 0.

( *(cc2538_reg_t*)0x4008b600 )

AES_HASH_DATA_IN_1

AES HASH data input register 1.

( *(cc2538_reg_t*)0x4008b604 )

AES_HASH_DATA_IN_2

AES HASH data input register 2.

( *(cc2538_reg_t*)0x4008b608 )

AES_HASH_DATA_IN_3

AES HASH data input register 3.

( *(cc2538_reg_t*)0x4008b60c )

AES_HASH_DATA_IN_4

AES HASH data input register 4.

( *(cc2538_reg_t*)0x4008b610 )

AES_HASH_DATA_IN_5

AES HASH data input register 5.

( *(cc2538_reg_t*)0x4008b614 )

AES_HASH_DATA_IN_6

AES HASH data input register 6.

( *(cc2538_reg_t*)0x4008b618 )

AES_HASH_DATA_IN_7

AES HASH data input register 7.

( *(cc2538_reg_t*)0x4008b61c )

AES_HASH_DATA_IN_8

AES HASH data input register 8.

( *(cc2538_reg_t*)0x4008b620 )

AES_HASH_DATA_IN_9

AES HASH data input register 9.

( *(cc2538_reg_t*)0x4008b624 )

AES_HASH_DATA_IN_10

AES HASH data input register 10.

( *(cc2538_reg_t*)0x4008b628 )

AES_HASH_DATA_IN_11

AES HASH data input register 11.

( *(cc2538_reg_t*)0x4008b62c )

AES_HASH_DATA_IN_12

AES HASH data input register 12.

( *(cc2538_reg_t*)0x4008b630 )

AES_HASH_DATA_IN_13

AES HASH data input register 13.

( *(cc2538_reg_t*)0x4008b634 )

AES_HASH_DATA_IN_14

AES HASH data input register 14.

( *(cc2538_reg_t*)0x4008b638 )

AES_HASH_DATA_IN_15

AES HASH data input register 15.

( *(cc2538_reg_t*)0x4008b63c )

AES_HASH_IO_BUF_CTRL

AES Input/output buffer control and status register.

( *(cc2538_reg_t*)0x4008b640 )

AES_HASH_MODE_IN

AES Hash mode register.

( *(cc2538_reg_t*)0x4008b644 )

AES_HASH_LENGTH_IN_L

AES Hash length register.

( *(cc2538_reg_t*)0x4008b648 )

AES_HASH_LENGTH_IN_H

AES Hash length register.

( *(cc2538_reg_t*)0x4008b64c )

AES_HASH_DIGEST_A

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b650 )

AES_HASH_DIGEST_B

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b654 )

AES_HASH_DIGEST_C

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b658 )

AES_HASH_DIGEST_D

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b65c )

AES_HASH_DIGEST_E

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b660 )

AES_HASH_DIGEST_F

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b664 )

AES_HASH_DIGEST_G

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b668 )

AES_HASH_DIGEST_H

AES Hash digest registers.

( *(cc2538_reg_t*)0x4008b66c )

AES_CTRL_ALG_SEL

AES Algorithm select.

( *(cc2538_reg_t*)0x4008b700 )

AES_CTRL_PROT_EN

AES Master PROT privileged access enable.

( *(cc2538_reg_t*)0x4008b704 )

AES_CTRL_SW_RESET

AES Software reset.

( *(cc2538_reg_t*)0x4008b740 )

AES_CTRL_INT_CFG

AES Interrupt configuration.

( *(cc2538_reg_t*)0x4008b780 )

AES_CTRL_INT_EN

AES Interrupt enable.

( *(cc2538_reg_t*)0x4008b784 )

AES_CTRL_INT_CLR

AES Interrupt clear.

( *(cc2538_reg_t*)0x4008b788 )

AES_CTRL_INT_SET

AES Interrupt set.

( *(cc2538_reg_t*)0x4008b78c )

AES_CTRL_INT_STAT

AES Interrupt status.

( *(cc2538_reg_t*)0x4008b790 )

AES_CTRL_OPTIONS

AES Options register.

( *(cc2538_reg_t*)0x4008b7f8 )

AES_CTRL_VERSION

AES Version register.

( *(cc2538_reg_t*)0x4008b7fc )

SYS_CTRL_CLOCK_CTRL

Clock control register.

( *(cc2538_reg_t*)0x400d2000 )

SYS_CTRL_CLOCK_STA

Clock status register.

( *(cc2538_reg_t*)0x400d2004 )

SYS_CTRL_RCGCGPT

Module clocks for GPT[3:0] when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d2008 )

SYS_CTRL_SCGCGPT

Module clocks for GPT[3:0] when the CPU is in sleep mode.

( *(cc2538_reg_t*)0x400d200c )

SYS_CTRL_DCGCGPT

Module clocks for GPT[3:0] when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d2010 )

SYS_CTRL_SRGPT

Reset for GPT[3:0].

( *(cc2538_reg_t*)0x400d2014 )

SYS_CTRL_RCGCSSI

Module clocks for SSI[1:0] when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d2018 )

SYS_CTRL_SCGCSSI

Module clocks for SSI[1:0] when the CPU is insSleep mode.

( *(cc2538_reg_t*)0x400d201c )

SYS_CTRL_DCGCSSI

Module clocks for SSI[1:0] when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d2020 )

SYS_CTRL_SRSSI

Reset for SSI[1:0].

( *(cc2538_reg_t*)0x400d2024 )

SYS_CTRL_RCGCUART

Module clocks for UART[1:0] when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d2028 )

SYS_CTRL_SCGCUART

Module clocks for UART[1:0] when the CPU is in sleep mode.

( *(cc2538_reg_t*)0x400d202c )

SYS_CTRL_DCGCUART

Module clocks for UART[1:0] when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d2030 )

SYS_CTRL_SRUART

Reset for UART[1:0].

( *(cc2538_reg_t*)0x400d2034 )

SYS_CTRL_RCGCI2C

Module clocks for I2C when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d2038 )

SYS_CTRL_SCGCI2C

Module clocks for I2C when the CPU is in sleep mode.

( *(cc2538_reg_t*)0x400d203c )

SYS_CTRL_DCGCI2C

Module clocks for I2C when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d2040 )

SYS_CTRL_SRI2C

Reset for I2C.

( *(cc2538_reg_t*)0x400d2044 )

SYS_CTRL_RCGCSEC

Module clocks for the security module when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d2048 )

SYS_CTRL_SCGCSEC

Module clocks for the security module when the CPU is in sleep mode.

( *(cc2538_reg_t*)0x400d204c )

SYS_CTRL_DCGCSEC

Module clocks for the security module when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d2050 )

SYS_CTRL_SRSEC

Reset for the security module.

( *(cc2538_reg_t*)0x400d2054 )

SYS_CTRL_PMCTL

Power mode.

( *(cc2538_reg_t*)0x400d2058 )

SYS_CTRL_SRCRC

CRC on state retention.

( *(cc2538_reg_t*)0x400d205c )

SYS_CTRL_PWRDBG

Power debug register.

( *(cc2538_reg_t*)0x400d2074 )

SYS_CTRL_CLD

This register controls the clock loss detection feature.

( *(cc2538_reg_t*)0x400d2080 )

SYS_CTRL_IWE

This register controls interrupt wake-up.

( *(cc2538_reg_t*)0x400d2094 )

SYS_CTRL_I_MAP

This register selects which interrupt map to be used.

( *(cc2538_reg_t*)0x400d2098 )

SYS_CTRL_RCGCRFC

This register defines the module clocks for RF CORE when the CPU is in active (run) mode.

( *(cc2538_reg_t*)0x400d20a8 )

SYS_CTRL_SCGCRFC

This register defines the module clocks for RF CORE when the CPU is in sleep mode.

( *(cc2538_reg_t*)0x400d20ac )

SYS_CTRL_DCGCRFC

This register defines the module clocks for RF CORE when the CPU is in PM0.

( *(cc2538_reg_t*)0x400d20b0 )

SYS_CTRL_EMUOVR

This register defines the emulator override controls for power mode and peripheral clock gate.

( *(cc2538_reg_t*)0x400d20b4 )

FLASH_CTRL_FCTL

Flash control.

( *(cc2538_reg_t*)0x400d3008 )

FLASH_CTRL_FADDR

Flash address.

( *(cc2538_reg_t*)0x400d300c )

FLASH_CTRL_FWDATA

Flash data.

( *(cc2538_reg_t*)0x400d3010 )

FLASH_CTRL_DIECFG0

Flash Die Configuration 0.

( *(cc2538_reg_t*)0x400d3014 )

FLASH_CTRL_DIECFG1

Flash Die Configuration 1.

( *(cc2538_reg_t*)0x400d3018 )

FLASH_CTRL_DIECFG2

Flash Die Configuration 2.

( *(cc2538_reg_t*)0x400d301c )

IOC_PA0_SEL

Peripheral select control for PA0.

( *(cc2538_reg_t*)0x400d4000 )

IOC_PA1_SEL

Peripheral select control for PA1.

( *(cc2538_reg_t*)0x400d4004 )

IOC_PA2_SEL

Peripheral select control for PA2.

( *(cc2538_reg_t*)0x400d4008 )

IOC_PA3_SEL

Peripheral select control for PA3.

( *(cc2538_reg_t*)0x400d400c )

IOC_PA4_SEL

Peripheral select control for PA4.

( *(cc2538_reg_t*)0x400d4010 )

IOC_PA5_SEL

Peripheral select control for PA5.

( *(cc2538_reg_t*)0x400d4014 )

IOC_PA6_SEL

Peripheral select control for PA6.

( *(cc2538_reg_t*)0x400d4018 )

IOC_PA7_SEL

Peripheral select control for PA7.

( *(cc2538_reg_t*)0x400d401c )

IOC_PB0_SEL

Peripheral select control for PB0.

( *(cc2538_reg_t*)0x400d4020 )

IOC_PB1_SEL

Peripheral select control for PB1.

( *(cc2538_reg_t*)0x400d4024 )

IOC_PB2_SEL

Peripheral select control for PB2.

( *(cc2538_reg_t*)0x400d4028 )

IOC_PB3_SEL

Peripheral select control for PB3.

( *(cc2538_reg_t*)0x400d402c )

IOC_PB4_SEL

Peripheral select control for PB4.

( *(cc2538_reg_t*)0x400d4030 )

IOC_PB5_SEL

Peripheral select control for PB5.

( *(cc2538_reg_t*)0x400d4034 )

IOC_PB6_SEL

Peripheral select control for PB6.

( *(cc2538_reg_t*)0x400d4038 )

IOC_PB7_SEL

Peripheral select control for PB7.

( *(cc2538_reg_t*)0x400d403c )

IOC_PC0_SEL

Peripheral select control for PC0.

( *(cc2538_reg_t*)0x400d4040 )

IOC_PC1_SEL

Peripheral select control for PC1.

( *(cc2538_reg_t*)0x400d4044 )

IOC_PC2_SEL

Peripheral select control for PC2.

( *(cc2538_reg_t*)0x400d4048 )

IOC_PC3_SEL

Peripheral select control for PC3.

( *(cc2538_reg_t*)0x400d404c )

IOC_PC4_SEL

Peripheral select control for PC4.

( *(cc2538_reg_t*)0x400d4050 )

IOC_PC5_SEL

Peripheral select control for PC5.

( *(cc2538_reg_t*)0x400d4054 )

IOC_PC6_SEL

Peripheral select control for PC6.

( *(cc2538_reg_t*)0x400d4058 )

IOC_PC7_SEL

Peripheral select control for PC7.

( *(cc2538_reg_t*)0x400d405c )

IOC_PD0_SEL

Peripheral select control for PD0.

( *(cc2538_reg_t*)0x400d4060 )

IOC_PD1_SEL

Peripheral select control for PD1.

( *(cc2538_reg_t*)0x400d4064 )

IOC_PD2_SEL

Peripheral select control for PD2.

( *(cc2538_reg_t*)0x400d4068 )

IOC_PD3_SEL

Peripheral select control for PD3.

( *(cc2538_reg_t*)0x400d406c )

IOC_PD4_SEL

Peripheral select control for PD4.

( *(cc2538_reg_t*)0x400d4070 )

IOC_PD5_SEL

Peripheral select control for PD5.

( *(cc2538_reg_t*)0x400d4074 )

IOC_PD6_SEL

Peripheral select control for PD6.

( *(cc2538_reg_t*)0x400d4078 )

IOC_PD7_SEL

Peripheral select control for PD7.

( *(cc2538_reg_t*)0x400d407c )

IOC_PA0_OVER

Overide configuration register for PA0.

( *(cc2538_reg_t*)0x400d4080 )

IOC_PA1_OVER

Overide configuration register for PA1.

( *(cc2538_reg_t*)0x400d4084 )

IOC_PA2_OVER

Overide configuration register for PA2.

( *(cc2538_reg_t*)0x400d4088 )

IOC_PA3_OVER

Overide configuration register for PA3.

( *(cc2538_reg_t*)0x400d408c )

IOC_PA4_OVER

Overide configuration register for PA4.

( *(cc2538_reg_t*)0x400d4090 )

IOC_PA5_OVER

Overide configuration register for PA5.

( *(cc2538_reg_t*)0x400d4094 )

IOC_PA6_OVER

Overide configuration register for PA6.

( *(cc2538_reg_t*)0x400d4098 )

IOC_PA7_OVER

Overide configuration register for PA7.

( *(cc2538_reg_t*)0x400d409c )

IOC_PB0_OVER

Overide configuration register for PB0.

( *(cc2538_reg_t*)0x400d40a0 )

IOC_PB1_OVER

Overide configuration register for PB1.

( *(cc2538_reg_t*)0x400d40a4 )

IOC_PB2_OVER

Overide configuration register for PB2.

( *(cc2538_reg_t*)0x400d40a8 )

IOC_PB3_OVER

Overide configuration register for PB3.

( *(cc2538_reg_t*)0x400d40ac )

IOC_PB4_OVER

Overide configuration register for PB4.

( *(cc2538_reg_t*)0x400d40b0 )

IOC_PB5_OVER

Overide configuration register for PB5.

( *(cc2538_reg_t*)0x400d40b4 )

IOC_PB6_OVER

Overide configuration register for PB6.

( *(cc2538_reg_t*)0x400d40b8 )

IOC_PB7_OVER

Overide configuration register for PB7.

( *(cc2538_reg_t*)0x400d40bc )

IOC_PC0_OVER

Overide configuration register for PC0.

( *(cc2538_reg_t*)0x400d40c0 )

PC0 has high drive capability.

IOC_PC1_OVER

Overide configuration register for PC1.

( *(cc2538_reg_t*)0x400d40c4 )

PC1 has high drive capability.

IOC_PC2_OVER

Overide configuration register for PC2.

( *(cc2538_reg_t*)0x400d40c8 )

PC2 has high drive capability.

IOC_PC3_OVER

Overide configuration register for PC3.

( *(cc2538_reg_t*)0x400d40cc )

PC3 has high drive capability.

IOC_PC4_OVER

Overide configuration register for PC4.

( *(cc2538_reg_t*)0x400d40d0 )

IOC_PC5_OVER

Overide configuration register for PC5.

( *(cc2538_reg_t*)0x400d40d4 )

IOC_PC6_OVER

Overide configuration register for PC6.

( *(cc2538_reg_t*)0x400d40d8 )

IOC_PC7_OVER

Overide configuration register for PC7.

( *(cc2538_reg_t*)0x400d40dc )

IOC_PD0_OVER

Overide configuration register for PD0.

( *(cc2538_reg_t*)0x400d40e0 )

IOC_PD1_OVER

Overide configuration register for PD1.

( *(cc2538_reg_t*)0x400d40e4 )

IOC_PD2_OVER

Overide configuration register for PD2.

( *(cc2538_reg_t*)0x400d40e8 )

IOC_PD3_OVER

Overide configuration register for PD3.

( *(cc2538_reg_t*)0x400d40ec )

IOC_PD4_OVER

Overide configuration register for PD4.

( *(cc2538_reg_t*)0x400d40f0 )

IOC_PD5_OVER

Overide configuration register for PD5.

( *(cc2538_reg_t*)0x400d40f4 )

IOC_PD6_OVER

Overide configuration register for PD6.

( *(cc2538_reg_t*)0x400d40f8 )

IOC_PD7_OVER

Overide configuration register for PD7.

( *(cc2538_reg_t*)0x400d40fc )

IOC_UARTRXD_UART0

Pin selection for UART0 RX.

( *(cc2538_reg_t*)0x400d4100 )

IOC_UARTCTS_UART1

Pin selection for UART1 CTS.

( *(cc2538_reg_t*)0x400d4104 )

IOC_UARTRXD_UART1

Pin selection for UART1 RX.

( *(cc2538_reg_t*)0x400d4108 )

IOC_CLK_SSI_SSI0

Pin selection for SSI0 CLK.

( *(cc2538_reg_t*)0x400d410c )

IOC_SSIRXD_SSI0

Pin selection for SSI0 RX.

( *(cc2538_reg_t*)0x400d4110 )

IOC_SSIFSSIN_SSI0

Pin selection for SSI0 FSSIN.

( *(cc2538_reg_t*)0x400d4114 )

IOC_CLK_SSIIN_SSI0

Pin selection for SSI0 CLK_SSIN.

( *(cc2538_reg_t*)0x400d4118 )

IOC_CLK_SSI_SSI1

Pin selection for SSI1 CLK.

( *(cc2538_reg_t*)0x400d411c )

IOC_SSIRXD_SSI1

Pin selection for SSI1 RX.

( *(cc2538_reg_t*)0x400d4120 )

IOC_SSIFSSIN_SSI1

Pin selection for SSI1 FSSIN.

( *(cc2538_reg_t*)0x400d4124 )

IOC_CLK_SSIIN_SSI1

Pin selection for SSI1 CLK_SSIN.

( *(cc2538_reg_t*)0x400d4128 )

IOC_I2CMSSDA

Pin selection for I2C SDA.

( *(cc2538_reg_t*)0x400d412c )

IOC_I2CMSSCL

Pin selection for I2C SCL.

( *(cc2538_reg_t*)0x400d4130 )

IOC_GPT0OCP1

Pin selection for GPT0OCP1.

( *(cc2538_reg_t*)0x400d4134 )

IOC_GPT0OCP2

Pin selection for GPT0OCP2.

( *(cc2538_reg_t*)0x400d4138 )

IOC_GPT1OCP1

Pin selection for GPT1OCP1.

( *(cc2538_reg_t*)0x400d413c )

IOC_GPT1OCP2

Pin selection for GPT1OCP2.

( *(cc2538_reg_t*)0x400d4140 )

IOC_GPT2OCP1

Pin selection for GPT2OCP1.

( *(cc2538_reg_t*)0x400d4144 )

IOC_GPT2OCP2

Pin selection for GPT2OCP2.

( *(cc2538_reg_t*)0x400d4148 )

IOC_GPT3OCP1

Pin selection for GPT3OCP1.

( *(cc2538_reg_t*)0x400d414c )

IOC_GPT3OCP2

Pin selection for GPT3OCP2.

( *(cc2538_reg_t*)0x400d4150 )

SMWDTHROSC_WDCTL

Watchdog Timer Control.

( *(cc2538_reg_t*)0x400d5000 )

SMWDTHROSC_ST0

Sleep Timer 0 count and compare.

( *(cc2538_reg_t*)0x400d5040 )

SMWDTHROSC_ST1

Sleep Timer 1 count and compare.

( *(cc2538_reg_t*)0x400d5044 )

SMWDTHROSC_ST2

Sleep Timer 2 count and compare.

( *(cc2538_reg_t*)0x400d5048 )

SMWDTHROSC_ST3

Sleep Timer 3 count and compare.

( *(cc2538_reg_t*)0x400d504c )

SMWDTHROSC_STLOAD

Sleep Timer load status.

( *(cc2538_reg_t*)0x400d5050 )

SMWDTHROSC_STCC

Sleep Timer Capture control.

( *(cc2538_reg_t*)0x400d5054 )

SMWDTHROSC_STCS

Sleep Timer Capture status.

( *(cc2538_reg_t*)0x400d5058 )

SMWDTHROSC_STCV0

Sleep Timer Capture value byte 0.

( *(cc2538_reg_t*)0x400d505c )

SMWDTHROSC_STCV1

Sleep Timer Capture value byte 1.

( *(cc2538_reg_t*)0x400d5060 )

SMWDTHROSC_STCV2

Sleep Timer Capture value byte 2.

( *(cc2538_reg_t*)0x400d5064 )

SMWDTHROSC_STCV3

Sleep Timer Capture value byte 3.

( *(cc2538_reg_t*)0x400d5068 )

ANA_REGS_IVCTRL

Analog control register.

( *(cc2538_reg_t*)0x400d6004 )

GPIO_A_DATA

GPIO_A Data Register.

( *(cc2538_reg_t*)0x400d9000 )

GPIO_A_DIR

GPIO_A data direction register.

( *(cc2538_reg_t*)0x400d9400 )

GPIO_A_IS

GPIO_A Interrupt Sense register.

( *(cc2538_reg_t*)0x400d9404 )

GPIO_A_IBE

GPIO_A Interrupt Both-Edges register.

( *(cc2538_reg_t*)0x400d9408 )

GPIO_A_IEV

GPIO_A Interrupt Event Register.

( *(cc2538_reg_t*)0x400d940c )

GPIO_A_IE

GPIO_A Interrupt mask register.

( *(cc2538_reg_t*)0x400d9410 )

GPIO_A_RIS

GPIO_A Raw Interrupt Status register.

( *(cc2538_reg_t*)0x400d9414 )

GPIO_A_MIS

GPIO_A Masked Interrupt Status register.

( *(cc2538_reg_t*)0x400d9418 )

GPIO_A_IC

GPIO_A Interrupt Clear register.

( *(cc2538_reg_t*)0x400d941c )

GPIO_A_AFSEL

GPIO_A Alternate Function / mode control select register.

( *(cc2538_reg_t*)0x400d9420 )

GPIO_A_GPIOLOCK

GPIO_A Lock register.

( *(cc2538_reg_t*)0x400d9520 )

GPIO_A_GPIOCR

GPIO_A Commit Register.

( *(cc2538_reg_t*)0x400d9524 )

GPIO_A_PMUX

GPIO_A The PMUX register.

( *(cc2538_reg_t*)0x400d9700 )

GPIO_A_P_EDGE_CTRL

GPIO_A The Port Edge Control register.

( *(cc2538_reg_t*)0x400d9704 )

GPIO_A_PI_IEN

GPIO_A The Power-up Interrupt Enable register.

( *(cc2538_reg_t*)0x400d9710 )

GPIO_A_IRQ_DETECT_ACK

GPIO_A IRQ Detect ACK register.

( *(cc2538_reg_t*)0x400d9718 )

GPIO_A_USB_IRQ_ACK

GPIO_A IRQ Detect ACK for USB.

( *(cc2538_reg_t*)0x400d971c )

GPIO_A_IRQ_DETECT_UNMASK

GPIO_A IRQ Detect ACK for masked interrupts.

( *(cc2538_reg_t*)0x400d9720 )

GPIO_B_DATA

GPIO Data Register.

( *(cc2538_reg_t*)0x400da000 )

GPIO_B_DIR

GPIO_B data direction register.

( *(cc2538_reg_t*)0x400da400 )

GPIO_B_IS

GPIO_B Interrupt Sense register.

( *(cc2538_reg_t*)0x400da404 )

GPIO_B_IBE

GPIO_B Interrupt Both-Edges register.

( *(cc2538_reg_t*)0x400da408 )

GPIO_B_IEV

GPIO_B Interrupt Event Register.

( *(cc2538_reg_t*)0x400da40c )

GPIO_B_IE

GPIO_B Interrupt mask register.

( *(cc2538_reg_t*)0x400da410 )

GPIO_B_RIS

GPIO_B Raw Interrupt Status register.

( *(cc2538_reg_t*)0x400da414 )

GPIO_B_MIS

GPIO_B Masked Interrupt Status register.

( *(cc2538_reg_t*)0x400da418 )

GPIO_B_IC

GPIO_B Interrupt Clear register.

( *(cc2538_reg_t*)0x400da41c )

GPIO_B_AFSEL

GPIO_B Alternate Function / mode control select register.

( *(cc2538_reg_t*)0x400da420 )

GPIO_B_GPIOLOCK

GPIO_B Lock register.

( *(cc2538_reg_t*)0x400da520 )

GPIO_B_GPIOCR

GPIO_B Commit Register.

( *(cc2538_reg_t*)0x400da524 )

GPIO_B_PMUX

GPIO_B The PMUX register.

( *(cc2538_reg_t*)0x400da700 )

GPIO_B_P_EDGE_CTRL

GPIO_B The Port Edge Control register.

( *(cc2538_reg_t*)0x400da704 )

GPIO_B_PI_IEN

GPIO_B The Power-up Interrupt Enable register.

( *(cc2538_reg_t*)0x400da710 )

GPIO_B_IRQ_DETECT_ACK

GPIO_B IRQ Detect ACK register.

( *(cc2538_reg_t*)0x400da718 )

GPIO_B_USB_IRQ_ACK

GPIO_B IRQ Detect ACK for USB.

( *(cc2538_reg_t*)0x400da71c )

GPIO_B_IRQ_DETECT_UNMASK

GPIO_B IRQ Detect ACK for masked interrupts.

( *(cc2538_reg_t*)0x400da720 )

GPIO_C_DATA

GPIO_C Data Register.

( *(cc2538_reg_t*)0x400db000 )

GPIO_C_DIR

GPIO_C data direction register.

( *(cc2538_reg_t*)0x400db400 )

GPIO_C_IS

GPIO_C Interrupt Sense register.

( *(cc2538_reg_t*)0x400db404 )

GPIO_C_IBE

GPIO_C Interrupt Both-Edges register.

( *(cc2538_reg_t*)0x400db408 )

GPIO_C_IEV

GPIO_C Interrupt Event Register.

( *(cc2538_reg_t*)0x400db40c )

GPIO_C_IE

GPIO_C Interrupt mask register.

( *(cc2538_reg_t*)0x400db410 )

GPIO_C_RIS

GPIO_C Raw Interrupt Status register.

( *(cc2538_reg_t*)0x400db414 )

GPIO_C_MIS

GPIO_C Masked Interrupt Status register.

( *(cc2538_reg_t*)0x400db418 )

GPIO_C_IC

GPIO_C Interrupt Clear register.

( *(cc2538_reg_t*)0x400db41c )

GPIO_C_AFSEL

GPIO_C Alternate Function / mode control select register.

( *(cc2538_reg_t*)0x400db420 )

GPIO_C_GPIOLOCK

GPIO_C Lock register.

( *(cc2538_reg_t*)0x400db520 )

GPIO_C_GPIOCR

GPIO_C Commit Register.

( *(cc2538_reg_t*)0x400db524 )

GPIO_C_PMUX

GPIO_C The PMUX register.

( *(cc2538_reg_t*)0x400db700 )

GPIO_C_P_EDGE_CTRL

GPIO_C The Port Edge Control register.

( *(cc2538_reg_t*)0x400db704 )

GPIO_C_PI_IEN

GPIO_C The Power-up Interrupt Enable register.

( *(cc2538_reg_t*)0x400db710 )

GPIO_C_IRQ_DETECT_ACK

GPIO_C IRQ Detect ACK register.

( *(cc2538_reg_t*)0x400db718 )

GPIO_C_USB_IRQ_ACK

GPIO_C IRQ Detect ACK for USB.

( *(cc2538_reg_t*)0x400db71c )

GPIO_C_IRQ_DETECT_UNMASK

GPIO_C IRQ Detect ACK for masked interrupts.

( *(cc2538_reg_t*)0x400db720 )

GPIO_D_DATA

GPIO_D Data Register.

( *(cc2538_reg_t*)0x400dc000 )

GPIO_D_DIR

GPIO_D data direction register.

( *(cc2538_reg_t*)0x400dc400 )

GPIO_D_IS

GPIO_D Interrupt Sense register.

( *(cc2538_reg_t*)0x400dc404 )

GPIO_D_IBE

GPIO_D Interrupt Both-Edges register.

( *(cc2538_reg_t*)0x400dc408 )

GPIO_D_IEV

GPIO_D Interrupt Event Register.

( *(cc2538_reg_t*)0x400dc40c )

GPIO_D_IE

GPIO_D Interrupt mask register.

( *(cc2538_reg_t*)0x400dc410 )

GPIO_D_RIS

GPIO_D Raw Interrupt Status register.

( *(cc2538_reg_t*)0x400dc414 )

GPIO_D_MIS

GPIO_D Masked Interrupt Status register.

( *(cc2538_reg_t*)0x400dc418 )

GPIO_D_IC

GPIO_D Interrupt Clear register.

( *(cc2538_reg_t*)0x400dc41c )

GPIO_D_AFSEL

GPIO_D Alternate Function / mode control select register.

( *(cc2538_reg_t*)0x400dc420 )

GPIO_D_GPIOLOCK

GPIO_D Lock register.

( *(cc2538_reg_t*)0x400dc520 )

GPIO_D_GPIOCR

GPIO_D Commit Register.

( *(cc2538_reg_t*)0x400dc524 )

GPIO_D_PMUX

GPIO_D The PMUX register.

( *(cc2538_reg_t*)0x400dc700 )

GPIO_D_P_EDGE_CTRL

GPIO_D The Port Edge Control register.

( *(cc2538_reg_t*)0x400dc704 )

GPIO_D_PI_IEN

GPIO_D The Power-up Interrupt Enable register.

( *(cc2538_reg_t*)0x400dc710 )

GPIO_D_IRQ_DETECT_ACK

GPIO_D IRQ Detect ACK register.

( *(cc2538_reg_t*)0x400dc718 )

GPIO_D_USB_IRQ_ACK

GPIO_D IRQ Detect ACK for USB.

( *(cc2538_reg_t*)0x400dc71c )

GPIO_D_IRQ_DETECT_UNMASK

GPIO_D IRQ Detect ACK for masked interrupts.

( *(cc2538_reg_t*)0x400dc720 )

UDMA_STAT

DMA status.

( *(cc2538_reg_t*)0x400ff000 )

UDMA_CFG

DMA configuration.

( *(cc2538_reg_t*)0x400ff004 )

UDMA_CTLBASE

DMA channel control base pointer.

( *(cc2538_reg_t*)0x400ff008 )

UDMA_ALTBASE

DMA alternate channel control base pointer.

( *(cc2538_reg_t*)0x400ff00c )

UDMA_WAITSTAT

DMA channel wait-on-request status.

( *(cc2538_reg_t*)0x400ff010 )

UDMA_SWREQ

DMA channel software request.

( *(cc2538_reg_t*)0x400ff014 )

UDMA_USEBURSTSET

DMA channel useburst set.

( *(cc2538_reg_t*)0x400ff018 )

UDMA_USEBURSTCLR

DMA channel useburst clear.

( *(cc2538_reg_t*)0x400ff01c )

UDMA_REQMASKSET

DMA channel request mask set.

( *(cc2538_reg_t*)0x400ff020 )

UDMA_REQMASKCLR

DMA channel request mask clear.

( *(cc2538_reg_t*)0x400ff024 )

UDMA_ENASET

DMA channel enable set.

( *(cc2538_reg_t*)0x400ff028 )

UDMA_ENACLR

DMA channel enable clear.

( *(cc2538_reg_t*)0x400ff02c )

UDMA_ALTSET

DMA channel primary alternate set.

( *(cc2538_reg_t*)0x400ff030 )

UDMA_ALTCLR

DMA channel primary alternate clear.

( *(cc2538_reg_t*)0x400ff034 )

UDMA_PRIOSET

DMA channel priority set.

( *(cc2538_reg_t*)0x400ff038 )

UDMA_PRIOCLR

DMA channel priority clear.

( *(cc2538_reg_t*)0x400ff03c )

UDMA_ERRCLR

DMA bus error clear.

( *(cc2538_reg_t*)0x400ff04c )

UDMA_CHASGN

DMA channel assignment.

( *(cc2538_reg_t*)0x400ff500 )

UDMA_CHIS

DMA channel interrupt status.

( *(cc2538_reg_t*)0x400ff504 )

UDMA_CHMAP0

DMA channel map select 0.

( *(cc2538_reg_t*)0x400ff510 )

UDMA_CHMAP1

DMA channel map select 1.

( *(cc2538_reg_t*)0x400ff514 )

UDMA_CHMAP2

DMA channel map select 2.

( *(cc2538_reg_t*)0x400ff518 )

UDMA_CHMAP3

DMA channel map select 3.

( *(cc2538_reg_t*)0x400ff51c )

PKA_APTR

PKA vector A address.

( *(cc2538_reg_t*)0x44004000 )

PKA_BPTR

PKA vector B address.

( *(cc2538_reg_t*)0x44004004 )

PKA_CPTR

PKA vector C address.

( *(cc2538_reg_t*)0x44004008 )

PKA_DPTR

PKA vector D address.

( *(cc2538_reg_t*)0x4400400c )

PKA_ALENGTH

PKA vector A length.

( *(cc2538_reg_t*)0x44004010 )

PKA_BLENGTH

PKA vector B length.

( *(cc2538_reg_t*)0x44004014 )

PKA_SHIFT

PKA bit shift value.

( *(cc2538_reg_t*)0x44004018 )

PKA_FUNCTION

PKA function.

( *(cc2538_reg_t*)0x4400401c )

PKA_COMPARE

PKA compare result.

( *(cc2538_reg_t*)0x44004020 )

PKA_MSW

PKA most-significant-word of result vector.

( *(cc2538_reg_t*)0x44004024 )

PKA_DIVMSW

PKA most-significant-word of divide remainder.

( *(cc2538_reg_t*)0x44004028 )

PKA_SEQ_CTRL

PKA sequencer control and status register.

( *(cc2538_reg_t*)0x440040c8 )

PKA_OPTIONS

PKA hardware options register.

( *(cc2538_reg_t*)0x440040f4 )

PKA_SW_REV

PKA firmware revision and capabilities register.

( *(cc2538_reg_t*)0x440040f8 )

PKA_REVISION

PKA hardware revision register.

( *(cc2538_reg_t*)0x440040fc )

CCTEST_IO

Output strength control.

( *(cc2538_reg_t*)0x44010000 )

CCTEST_OBSSEL0

CCTEST Select output signal on observation output 0.

( *(cc2538_reg_t*)0x44010014 )

CCTEST_OBSSEL1

CCTEST Select output signal on observation output 1.

( *(cc2538_reg_t*)0x44010018 )

CCTEST_OBSSEL2

CCTEST Select output signal on observation output 2.

( *(cc2538_reg_t*)0x4401001c )

CCTEST_OBSSEL3

CCTEST Select output signal on observation output 3.

( *(cc2538_reg_t*)0x44010020 )

CCTEST_OBSSEL4

CCTEST Select output signal on observation output 4.

( *(cc2538_reg_t*)0x44010024 )

CCTEST_OBSSEL5

CCTEST Select output signal on observation output 5.

( *(cc2538_reg_t*)0x44010028 )

CCTEST_OBSSEL6

CCTEST Select output signal on observation output 6.

( *(cc2538_reg_t*)0x4401002c )

CCTEST_OBSSEL7

CCTEST Select output signal on observation output 7.

( *(cc2538_reg_t*)0x44010030 )

CCTEST_TR0

CCTEST Test register 0.

( *(cc2538_reg_t*)0x44010034 )

CCTEST_USBCTRL

CCTEST USB PHY stand-by control.

( *(cc2538_reg_t*)0x44010050 )

__CM3_REV

Configuration of the Cortex-M3 Processor and Core Peripherals.

0x0200

CC2538 core revision number ([15:8] revision number, [7:0] patch number)

__MPU_PRESENT

CC2538 does provide a MPU.

1

__NVIC_PRIO_BITS

CC2538 uses 3 Bits for the Priority Levels.

3

__Vendor_SysTickConfig

Set to 1 if different SysTick Config is used.

0

IEEE_ADDR_MSWORD

CMSIS includes.

( *(const uint32_t*)0x00280028 )

Most-significant 32 bits of the IEEE address

IEEE_ADDR_LSWORD

Least-significant 32 bits of the IEEE address.

( *(const uint32_t*)0x0028002c )

FLASH_BASE

FLASH base address.

0x00200000

SRAM_BASE

SRAM base address.

0x20000000

PERIPH_BASE

Peripheral base address.

0x40000000

SRAM_BB_BASE

SRAM base address in the bit-band region.

0x22000000

XOSC32M_FREQ

32 MHz external oscillator/clock frequency

32000000

RCOSC16M_FREQ

16 MHz internal RC oscillator frequency

16000000

CC2538_VTOR_ALIGN

CC2538 Vector Table alignment.

512

uint32_t cc2538_reg_t

Least-significant 32 bits of the IEEE address.