cc2538/include/periph_cpu.h

CPU specific definitions for internal peripheral handling.

CPUID_ADDR

Starting offset of CPU_ID. 

1
(&IEEE_ADDR_MSWORD)
CPUID_LEN

Length of the CPU_ID in octets. 

1
(8U)
HAVE_GPIO_T
uint32_t gpio_t
PROVIDES_PM_SET_LOWEST_CORTEXM
PERIPH_I2C_NEED_READ_REG
PERIPH_I2C_NEED_READ_REGS
PERIPH_I2C_NEED_WRITE_REG
PERIPH_I2C_NEED_WRITE_REGS
HAVE_I2C_SPEED_T
enum i2c_speed_t
I2C_SPEED_LOW = 0x01
not supported
I2C_SPEED_NORMAL = 100000U
normal mode: ~100kbit/s
I2C_SPEED_FAST = 400000U
fast mode: ~400kbit/s
I2C_SPEED_FAST_PLUS = 0x02
not supported
I2C_SPEED_HIGH = 0x03
not supported
PERIPH_SPI_NEEDS_INIT_CS
PERIPH_SPI_NEEDS_TRANSFER_BYTE
PERIPH_SPI_NEEDS_TRANSFER_REG
PERIPH_SPI_NEEDS_TRANSFER_REGS
HAVE_GPIO_MODE_T
enum gpio_mode_t
GPIO_IN_ANALOG = ((uint8_t)OVERRIDE_ANALOG)
input, analog
GPIO_IN_OUT
input and output
GPIO_IN_OD
input and open-drain output
GPIO_IN_OD_PU
input and open-drain output
GPIO_IN = ((uint8_t)OVERRIDE_DISABLE)
input, no pull
GPIO_IN_PD = ((uint8_t)OVERRIDE_PULLDOWN)
input, pull-down
GPIO_IN_PU = ((uint8_t)OVERRIDE_PULLUP)
input, pull-up
GPIO_OUT = ((uint8_t)OVERRIDE_ENABLE)
output
GPIO_OD = (0xff)
not supported
GPIO_OD_PU = (0xff)
not supported
HAVE_SPI_MODE_T
enum spi_mode_t
SPI_MODE_0 = SPI_MODE_SEL(0, 0)
mode 0
SPI_MODE_1 = SPI_MODE_SEL(0, 1)
mode 1
SPI_MODE_2 = SPI_MODE_SEL(1, 0)
mode 2
SPI_MODE_3 = SPI_MODE_SEL(1, 1)
mode 3
HAVE_SPI_CLK_T
enum spi_clk_t
SPI_CLK_4MHZ = 4000000
drive the SPI bus with 4MHz
SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1)
16/128 -> 125KHz
SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0)
16/32 -> 500KHz
SPI_CLK_1MHZ = SPI_CLK_SEL(0, 0, 1)
16/16 -> 1MHz
SPI_CLK_5MHZ = SPI_CLK_SEL(0, 0, 0)
16/4 -> 4MHz
SPI_CLK_10MHZ = SPI_CLK_SEL(1, 0, 0)
16/2 -> 8MHz
HAVE_ADC_RES_T
enum adc_res_t
ADC_RES_7BIT =             (0 << 4)
ADC resolution: 7 bit.
ADC_RES_9BIT =             (1 << 4)
ADC resolution: 9 bit.
ADC_RES_11BIT
ADC resolution: 11 bit.
ADC_RES_6BIT =             (0xa00)
not supported by hardware
ADC_RES_8BIT =             (0xb00)
not supported by hardware
ADC_RES_10BIT =             (2 << 4)
ADC resolution: 10 bit.
ADC_RES_12BIT =             (3 << 4)
ADC resolution: 12 bit.
ADC_RES_14BIT =             (0xc00)
not supported by hardware
ADC_RES_16BIT =             (0xd00)
not supported by hardware
SOC_ADC_ADCCON3_EREF_INT

Internal reference. 

1
(0 << SOC_ADC_ADCCON3_EREF_S)
SOC_ADC_ADCCON3_EREF_EXT

External reference on AIN7 pin. 

1
(1 << SOC_ADC_ADCCON3_EREF_S)
SOC_ADC_ADCCON3_EREF_AVDD5

AVDD5 pin. 

1
(2 << SOC_ADC_ADCCON3_EREF_S)
SOC_ADC_ADCCON3_EREF_DIFF

External reference on AIN6-AIN7 differential input. 

1
(3 << SOC_ADC_ADCCON3_EREF_S)
SOCADC_7_BIT_RSHIFT

Mask for getting data( 7 bits ENOB) 

1
(9U)
SOCADC_9_BIT_RSHIFT

Mask for getting data( 9 bits ENOB) 

1
(7U)
SOCADC_10_BIT_RSHIFT

Mask for getting data(10 bits ENOB) 

1
(6U)
SOCADC_12_BIT_RSHIFT

Mask for getting data(12 bits ENOB) 

1
(4U)
GPIO_UNDEF

Define custom value to speficy undefined or unused GPIOs. 

1
(0xffffffff)
GPIO_MUX_NONE

Custom value to indicate unused parameter in gpio_init_mux. 

1
(0xff)
GPIO_PIN( port, pin)

Define a custom GPIO_PIN macro. 

1
2
(gpio_t)(((uint32_t)GPIO_BASE + \
                                      (port << GPIO_PORTNUM_SHIFT)) | pin)

For the CC2538, we use OR the gpio ports base register address with the actual pin number.

gpio.h::gpio_t adc_conf_t

ADC configuration wrapper.

const spi_clk_conf_t spi_clk_config()

Pre-calculated clock divider values based on a CLOCK_CORECLOCK (32MHz) 

1
2
3
4
5
6
7
= {
    { .cpsr = 64, .scr =  4 },  
    { .cpsr = 16, .scr =  4 },  
    { .cpsr = 32, .scr =  0 },  
    { .cpsr =  2, .scr =  2 },  
    { .cpsr =  2, .scr =  1 }   
}

SPI bus frequency = CLOCK_CORECLOCK / (CPSR * (SCR + 1)), with CPSR = 2..254 and even, SCR = 0..255

void gpio_init_af(gpio.h::gpio_t pin, uint8_t sel, uint8_t over)

Configure an alternate function for the given pin.

Parameters

pin:gpio pin
sel:Select pin peripheral function
over:Override pin configuration

void gpio_init_mux(gpio.h::gpio_t pin, uint8_t over, uint8_t sel, uint8_t func)

Configure an alternate function for the given pin.

Parameters

pin:gpio pin
over:Override pin configuration
sel:Set peripheral function for pin (output)
func:Set pin for peripheral function (input)

struct i2c_conf_t

I2C configuration options.

Structure for I2C configuration data.

I2C (TWI) configuration options.

I2C configuration structure.

I2C device configuration.

cc2538/include/periph_cpu.h::i2c_speed_t speed

baudrate used for the bus

i2c bus speed

Bus speed.

bus speed

Configured bus speed, actual speed may be lower but never higher.

gpio.h::gpio_t scl_pin

pin used for SCL

scl pin number

used SCL pin

SCL GPIO pin.

gpio.h::gpio_t sda_pin

pin used for SDA

sda pin number

used MOSI pin

SDA GPIO pin.

I2C_TypeDef * dev

USART device used.

i2c device

uint32_t loc

location of I2C pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

uint32_t speed

the bus speed

I2C_Type * i2c

Pointer to hardware module registers.

uint32_t freq

I2C module clock frequency, usually CLOCK_BUSCLOCK or CLOCK_CORECLOCK.

cc2538.h::IRQn_Type irqn

IRQ number for this module.

uint32_t scl_pcr

PORT module PCR setting for the SCL pin.

uint32_t sda_pcr

PORT module PCR setting for the SDA pin.

NRF_TWI_Type * dev

hardware device

uint8_t pin_scl

SCL pin.

uint8_t pin_sda

SDA pin.

uint8_t ppi

PPI channel to use.

NRF_TWIM_Type * dev

TWIM hardware device.

uint8_t scl

SCL pin.

uint8_t sda

SDA pin.

SercomI2cm * dev

pointer to the used I2C device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternate function (mux)

uint8_t gclk_src

GCLK source which supplys SERCOM.

uint8_t flags

allow SERCOM to run in standby mode

stm32_common/include/periph_cpu_common.h::gpio_af_t scl_af

scl pin alternate function value

stm32_common/include/periph_cpu_common.h::gpio_af_t sda_af

sda pin alternate function value

uint8_t bus

APB bus.

uint32_t rcc_mask

bit in clock enable register

uint8_t irqn

I2C event interrupt number.

struct uart_conf_t

UART device configuration.

Structure for UART configuration data.

UART configuration data.

UART module configuration options.

cc2538_uart_t * dev

pointer to the used UART device

UART device base register address.

Pointer to module hardware registers.

gpio.h::gpio_t rx_pin

pin used for RX

RX pin.

Pin used for RX.

gpio.h::gpio_t tx_pin

pin used for TX

TX pin.

Pin used for TX.

gpio.h::gpio_t cts_pin

CTS pin - set to GPIO_UNDEF when not using.

gpio.h::gpio_t rts_pin

RTS pin - set to GPIO_UNDEF when not using.

void * dev

UART, USART or LEUART device used.

Pointer to module hardware registers.

uint32_t loc

location of UART pins

CMU_Clock_TypeDef cmu

the device CMU channel

cc2538.h::IRQn_Type irq

the devices base IRQ channel

USART_TypeDef * dev

USART device used.

UART device base register address.

uint8_t loc

location of USART pins (AF)

uint8_t cmu

the device CMU channel

uint8_t irq

the devices base IRQ channel

uint32_t freq

Module clock frequency, usually CLOCK_CORECLOCK or CLOCK_BUSCLOCK.

gpio.h::gpio_t pin_rx

RX pin, GPIO_UNDEF disables RX.

gpio.h::gpio_t pin_tx

TX pin.

uint32_t pcr_rx

Pin configuration register bits for RX.

uint32_t pcr_tx

Pin configuration register bits for TX.

uint32_t * scgc_addr

Clock enable register, in SIM module.

uint8_t scgc_bit

Clock enable bit, within the register.

kinetis/include/periph_cpu.h::uart_mode_t mode

UART mode: data bits, parity, stop bits.

kinetis/include/periph_cpu.h::uart_type_t type

Hardware module type (KINETIS_UART or KINETIS_LPUART)

SercomUsart * dev

pointer to the used UART device

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

alternative function for pins

MUX used for pins.

sam0_common/include/periph_cpu_common.h::uart_rxpad_t rx_pad

pad selection for RX line

sam0_common/include/periph_cpu_common.h::uart_txpad_t tx_pad

pad selection for TX line

sam0_common/include/periph_cpu_common.h::uart_flag_t flags

set optional SERCOM flags

uint32_t gclk_src

GCLK source which supplys SERCOM.

Uart * dev

U(S)ART device used.

uint8_t pmc_id

bit in the PMC register of the device

cc2538.h::IRQn_Type irqn

IRQ number for this module.

IRQ channel.

uint32_t rcc_mask

bit in clock enable register

stm32_common/include/periph_cpu_common.h::gpio_af_t rx_af

alternate function for RX pin

stm32_common/include/periph_cpu_common.h::gpio_af_t tx_af

alternate function for TX pin

uint8_t bus

APB bus.

struct spi_clk_conf_t

Datafields for static SPI clock configuration values.

uint8_t cpsr

CPSR clock divider.

uint8_t scr

SCR clock divider.

struct spi_conf_t

SPI module configuration options.

Structure for SPI configuration data.

SPI configuration data.

SPI device configuration.

SPI configuration values.

SPI configuration data structure.

uint8_t num

number of SSI device, i.e.

0 or 1

gpio.h::gpio_t mosi_pin

pin used for MOSI

MOSI pin.

used MOSI pin

gpio.h::gpio_t miso_pin

pin used for MISO

MISO pin.

used MISO pin

gpio.h::gpio_t sck_pin

pin used for SCK

gpio.h::gpio_t cs_pin

pin used for CS

HWCS pin, set to GPIO_UNDEF if not mapped.

SPI_Type * dev

SPI device to use.

gpio.h::gpio_t pin_miso

MISO pin used.

gpio.h::gpio_t pin_mosi

MOSI pin used.

gpio.h::gpio_t pin_clk

CLK pin used.

gpio.h::gpio_t pin_cs()

pins used for HW cs lines

kinetis/include/periph_cpu.h::gpio_pcr_t pcr

alternate pin function values

uint32_t simmask

bit in the SIM register

unsigned long ssi_sysctl

SSI device in sysctl.

unsigned long ssi_base

SSI base address.

unsigned long gpio_sysctl

GPIO device in sysctl.

unsigned long gpio_port

GPIO port.

unsigned long clk

pin used for SCK

unsigned long fss

pin used for FSS

unsigned long rx

pin used for MISO

unsigned long tx

pin used for MOSI

unsigned long mask

Pin mask.

struct spi_conf_t::@74 pins

Pin setting.

NRF_SPI_Type * dev

SPI device used.

uint8_t sclk

CLK pin.

uint8_t mosi

MOSI pin.

uint8_t miso

MISO pin.

SercomSpi * dev

pointer to the used SPI device

gpio.h::gpio_t clk_pin

used CLK pin

sam0_common/include/periph_cpu_common.h::gpio_mux_t miso_mux

alternate function for MISO pin (mux)

sam0_common/include/periph_cpu_common.h::gpio_mux_t mosi_mux

alternate function for MOSI pin (mux)

sam0_common/include/periph_cpu_common.h::gpio_mux_t clk_mux

alternate function for CLK pin (mux)

sam0_common/include/periph_cpu_common.h::spi_misopad_t miso_pad

pad to use for MISO line

sam0_common/include/periph_cpu_common.h::spi_mosipad_t mosi_pad

pad to use for MOSI and CLK line

Spi * dev

SPI module to use.

uint8_t id

corresponding ID of that module

gpio.h::gpio_t clk

pin mapped to the CLK line

gpio.h::gpio_t mosi

pin mapped to the MOSI line

gpio.h::gpio_t miso

pin mapped to the MISO line

sam0_common/include/periph_cpu_common.h::gpio_mux_t mux

pin MUX setting

SPI_TypeDef * dev

SPI device base register address.

gpio.h::gpio_t sclk_pin

SCLK pin.

stm32_common/include/periph_cpu_common.h::gpio_af_t af

pin alternate function

uint32_t rccmask

bit in the RCC peripheral enable register

uint8_t apbbus

APBx bus the device is connected to.

struct timer_conf_t

Timer configuration.

Timer configuration data.

Timer configuration options.

Define timer configuration values.

General purpose timers (GPT[0-3]) are configured consecutively and in order (without gaps) starting from GPT0, i.e. if multiple timers are enabled.

Note

The two timers must be adjacent to each other (e.g. TIMER0 and TIMER1, or TIMER2 and TIMER3, etc.).

uint_fast8_t chn

number of channels

uint_fast8_t cfg

timer config word

timer_dev_t prescaler

the lower numbered neighboring timer

timer_dev_t timer

the higher numbered timer

cc2538.h::IRQn_Type irq

number of the higher timer IRQ channel

TIMER_TypeDef * prescaler

the lower numbered neighboring timer

TIMER_TypeDef * timer

the higher numbered timer

uint8_t pre_cmu

prescale timer bit in CMU register, the timer bit is deducted from this

uint8_t irqn

number of the higher timer IRQ channel

global IRQ channel

IRQ number of the timer device.

NRF_TIMER_Type * dev

timer device

uint8_t channels

number of channels available

uint8_t bitmode

counter width

Tc * dev

timer device

uint8_t id_ch0

ID of the timer’s first channel.

TIM_TypeDef * dev

timer device

uint32_t max

maximum value to count to (16/32 bit)

uint32_t rcc_mask

corresponding bit in the RCC register

uint8_t bus

APBx bus the timer is clock from.