STM32 common

STM32 common code and definitions.

This module contains all common code and definition to all STM32 cpu families supported by RIOT: STM32F0, STM32L0, STM32F1, STM32F2, STM32F3, STM32F4, STM32L4, STM32F7.

STM32Fx Clock configuration

stm32fx cpus share clock configuration code and macro. It can be configured as described here.

The following macro must be defined in the board’s periph_conf.h:

  • CLOCK_HSE: 0 if HSI must be used as PLL source, frequency in Hz otherwise,
  • CLOCK_LSE: 0 if LSI must be used as low speed clock, 1 otherwise (the LSE is a 32.768kHz crytal)
  • CLOCK_CORECLOCK: desired main clock frequency
  • CLOCK_AHB_DIV, CLOCK_AHB: AHB prescaler in register value and AHB frequecny in Hz
  • CLOCK_APB1_DIV, CLOCK_APB1: APB1 prescaler in register value and APB1 frequecny in Hz
  • CLOCK_APB2_DIV, CLOCK_APB2: APB2 prescaler in register value and APB2 frequecny in Hz (CLOCK_APB2_DIV is not needed for stm32f0)

The following macro must be defined for stm32f[2|4|7]:

  • CLOCK_PLL_M, CLOCK_PLL_N, CLOCK_PLL_P, CLOCK_PLL_Q, (CLOCK_PLL_R, optional): Main PLL factors

The following macro must be defined for stm32f[0|1|3]:

  • PLL_MUL, PLL_PREDIV: PLL factors. These values are used as is. A PREDIV of 2 can be assumed when HSI is selected as PLL input. Some model support any value as PREDIV even with HSI though. The clk_conf tool will assume PREDIV must be to with HSI and will set it accordingly.

The following macro are optional and can be defined depending on board config and application needs:

  • CLOCK_ENABLE_PLL_I2S: if a second PLL (PLL I2S) is available on the cpu, it can be activated with this macro, then CLOCK_PLL_I2S_M, CLOCK_PLL_I2S_N, CLOCK_PLL_I2S_P and CLOCK_PLL_I2S_Q need to be defined, CLOCK_PLL_I2S_R is optional.
  • CLOCK_ENABLE_PLL_SAI: if a second PLL (PLL SAI) is available on the cpu, it can be activated with this macro, then CLOCK_PLL_SAI_M, CLOCK_PLL_SAI_N, CLOCK_PLL_SAI_P and CLOCK_PLL_SAI_Q need to be defined, CLOCK_PLL_SAI_R is optional.
  • CLOCK_USE_ALT_48MHZ: if the 48MHz clock should be generated by the alternate source (PLL I2S or PLL SAI, depending on cpu)

All the previous constants can be generated using the tool in cpu/stm32_common/dist/clk_conf.

Clock outputs can also be setup with macro:

  • CLOCK_MCOx_SRC, CLOCK_MCOx_PRE, with x=1,2: MCO1 and MCO2 output configuration macros. CLOCK_MCOx_SRC defines the MCOx source, as a register value (see vendor header), CLOCK_MCOx_PRE defines the MCOx prescaler, as a register value.