STM32 Nucleo-F746ZG

Support for the STM32 Nucleo-F746ZG.

CLOCK_CORECLOCK
1
(216000000U)
CLOCK_HSE
1
(8000000U)
CLOCK_LSE
1
(1)
CLOCK_AHB_DIV
1
RCC_CFGR_HPRE_DIV1
CLOCK_AHB
1
(CLOCK_CORECLOCK / 1)
CLOCK_APB1_DIV
1
RCC_CFGR_PPRE1_DIV4     /* max 54MHz */
CLOCK_APB1
1
(CLOCK_CORECLOCK / 4)
CLOCK_APB2_DIV
1
RCC_CFGR_PPRE2_DIV2     /* max 108MHz */
CLOCK_APB2
1
(CLOCK_CORECLOCK / 2)
CLOCK_PLL_M
1
(4)
CLOCK_PLL_N
1
(216)
CLOCK_PLL_P
1
(2)
CLOCK_PLL_Q
1
(9)
const timer_conf_t timer_config()
1
2
3
4
5
6
7
8
9
= {
    {
        .dev      = TIM2,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR_TIM2EN,
        .bus      = APB1,
        .irqn     = TIM2_IRQn
    }
}
TIMER_0_ISR
1
isr_tim2
TIMER_NUMOF
1
(sizeof(timer_config) / sizeof(timer_config[0]))
const uart_conf_t uart_config()
UART_0_ISR
1
(isr_usart3)
UART_0_DMA_ISR
1
(isr_dma1_stream6)
UART_1_ISR
1
(isr_usart6)
UART_1_DMA_ISR
1
(isr_dma1_stream5)
UART_2_ISR
1
(isr_usart2)
UART_2_DMA_ISR
1
(isr_dma1_stream4)
UART_NUMOF
1
(sizeof(uart_config) / sizeof(uart_config[0]))
ADC_NUMOF
1
(0)