STM32 Nucleo-F413ZH

Support for the STM32 Nucleo-F413ZH.

CLOCK_CORECLOCK
1
(100000000U)
CLOCK_HSE
1
(8000000U)
CLOCK_LSE
1
(1)
CLOCK_AHB_DIV
1
RCC_CFGR_HPRE_DIV1
CLOCK_AHB
1
(CLOCK_CORECLOCK / 1)
CLOCK_APB1_DIV
1
RCC_CFGR_PPRE1_DIV2     /* max 50MHz */
CLOCK_APB1
1
(CLOCK_CORECLOCK / 2)
CLOCK_APB2_DIV
1
RCC_CFGR_PPRE2_DIV1     /* max 100MHz */
CLOCK_APB2
1
(CLOCK_CORECLOCK / 1)
CLOCK_PLL_M
1
(4)
CLOCK_PLL_N
1
(200)
CLOCK_PLL_P
1
(4)
CLOCK_PLL_Q
1
(0)
CLOCK_ENABLE_PLL_I2S
1
(1)
CLOCK_PLL_I2S_SRC
1
(0)
CLOCK_PLL_I2S_M
1
(4)
CLOCK_PLL_I2S_N
1
(216)
CLOCK_PLL_I2S_P
1
(0)
CLOCK_PLL_I2S_Q
1
(9)
CLOCK_USE_ALT_48MHZ
1
(1)
const timer_conf_t timer_config()
1
2
3
4
5
6
7
8
9
= {
    {
        .dev      = TIM5,
        .max      = 0xffffffff,
        .rcc_mask = RCC_APB1ENR_TIM5EN,
        .bus      = APB1,
        .irqn     = TIM5_IRQn
    }
}
TIMER_0_ISR
1
isr_tim5
TIMER_NUMOF
1
(sizeof(timer_config) / sizeof(timer_config[0]))
const uart_conf_t uart_config()
UART_0_ISR
1
(isr_usart3)
UART_0_DMA_ISR
1
(isr_dma1_stream6)
UART_1_ISR
1
(isr_usart6)
UART_1_DMA_ISR
1
(isr_dma1_stream5)
UART_2_ISR
1
(isr_usart2)
UART_2_DMA_ISR
1
(isr_dma1_stream4)
UART_NUMOF
1
(sizeof(uart_config) / sizeof(uart_config[0]))
const pwm_conf_t pwm_config()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
19
20
21
22
= {
    {
        .dev      = TIM1,
        .rcc_mask = RCC_APB2ENR_TIM1EN,
        .chan     = { { .pin = GPIO_PIN(PORT_E,  9) , .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_E, 11) , .cc_chan = 1},
                      { .pin = GPIO_PIN(PORT_E, 13) , .cc_chan = 2},
                      { .pin = GPIO_UNDEF,                    .cc_chan = 0} },
        .af       = GPIO_AF1,
        .bus      = APB2
    },
    {
        .dev      = TIM4,
        .rcc_mask = RCC_APB1ENR_TIM4EN,
        .chan     = { { .pin = GPIO_PIN(PORT_D, 15) , .cc_chan = 3},
                      { .pin = GPIO_UNDEF,                    .cc_chan = 0},
                      { .pin = GPIO_UNDEF,                    .cc_chan = 0},
                      { .pin = GPIO_UNDEF,                    .cc_chan = 0} },
        .af       = GPIO_AF2,
        .bus      = APB1
    },
}
PWM_NUMOF
1
(sizeof(pwm_config) / sizeof(pwm_config[0]))
const uint8_t spi_divtable()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
= {
    {       
        7,  
        6,  
        5,  
        2,  
        1   
    },
    {       
        7,  
        7,  
        6,  
        3,  
        2   
    }
}
const spi_conf_t spi_config()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
= {
    {
        .dev      = SPI1,
        .mosi_pin = GPIO_PIN(PORT_A, 7),
        .miso_pin = GPIO_PIN(PORT_A, 6),
        .sclk_pin = GPIO_PIN(PORT_A, 5),
        .cs_pin   = GPIO_PIN(PORT_A, 4),
        .af       = GPIO_AF5,
        .rccmask  = RCC_APB2ENR_SPI1EN,
        .apbbus   = APB2,






    }
}
SPI_NUMOF
1
(sizeof(spi_config) / sizeof(spi_config[0]))
const i2c_conf_t i2c_config()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
= {
    {
        .dev            = I2C1,
        .speed          = I2C_SPEED_NORMAL,
        .scl_pin        = GPIO_PIN(PORT_B, 8),
        .sda_pin        = GPIO_PIN(PORT_B, 9),
        .scl_af         = GPIO_AF4,
        .sda_af         = GPIO_AF4,
        .bus            = APB1,
        .rcc_mask       = RCC_APB1ENR_I2C1EN,
        .clk            = CLOCK_APB1,
        .irqn           = I2C1_EV_IRQn
    }
}
I2C_0_ISR
1
isr_i2c1_ev
I2C_NUMOF
1
(sizeof(i2c_config) / sizeof(i2c_config[0]))
ADC_NUMOF
1
(6U)
ADC_CONFIG
1
2
3
4
5
6
7
8
{              \
    {GPIO_PIN(PORT_A, 3), 0, 3},  \
    {GPIO_PIN(PORT_C, 0), 0, 10}, \
    {GPIO_PIN(PORT_C, 3), 0, 13}, \
    {GPIO_PIN(PORT_C, 1), 0, 11}, \
    {GPIO_PIN(PORT_C, 4), 0, 14}, \
    {GPIO_PIN(PORT_C, 5), 0, 15}, \
}
RTC_NUMOF
1
(1)
RTT_NUMOF
1
(1)
RTT_FREQUENCY
1
(4096)
RTT_MAX_VALUE
1
(0xffff)