STM32 Nucleo-F030R8

Support for the STM32 Nucleo-F030R8.

Overview

The Nucleo-F030 is a board from ST’s Nucleo family supporting a ARM Cortex-M0 STM32F030R8 microcontroller with 8Kb of SRAM and 64Kb of ROM Flash.

Hardware

MCU

MCU STM32F030R8
Family ARM Cortex-M0
Vendor ST Microelectronics
RAM 8Kb
Flash 64Kb
Frequency up to 48MHz)
FPU yes
Timers 11 (2x watchdog, 1 SysTick, 8x 16-bit)
ADCs 1x 12-bit
UARTs 6
SPIs 2
I2Cs 2
RTC 1
Vcc 2.0V - 3.6V
Datasheet Datasheet
Reference Manual Reference Manual
Programming Manual Programming Manual
Board Manual Board Manual

MCU

MCU STM32F030R8
Family ARM Cortex-M0
Vendor ST Microelectronics
RAM 8Kb
Flash 64Kb
Frequency up to 48MHz)
FPU yes
Timers 11 (2x watchdog, 1 SysTick, 8x 16-bit)
ADCs 1x 12-bit
UARTs 6
SPIs 2
I2Cs 2
RTC 1
Vcc 2.0V - 3.6V
Datasheet Datasheet
Reference Manual Reference Manual
Programming Manual Programming Manual
Board Manual Board Manual

Implementation Status

Device ID Supported Comments
MCU STM32F030R8 partly Energy saving modes not fully utilized
Low-level driver GPIO yes
PWM yes (4 pins available)
UART 2 UARTs USART2 via STLink/USB or D0(RX)/D1(TX) and USART1 on PA10(RX)/PA09(TX)
ADC 6 pins
I2C no
SPI no
USB no
Timer 3 16 bit timers

Flashing the device

The ST Nucleo-F030 board includes an on-board ST-LINK V2 programmer. The easiest way to program the board is to use OpenOCD. Once you have installed OpenOCD (look here for installation instructions), you can flash the board simply by typing

1
make BOARD=nucleo-f030 flash
and debug via GDB by simply typing 
1
make BOARD=nucleo-f030 debug

Supported Toolchains

For using the ST Nucleo-F030 board we strongly recommend the usage of the GNU Tools for ARM Embedded Processors toolchain.

CLOCK_CORECLOCK
1
(48000000U)
CLOCK_HSE
1
(8000000U)
CLOCK_LSE
1
(1)
CLOCK_AHB_DIV
1
RCC_CFGR_HPRE_DIV1
CLOCK_AHB
1
(CLOCK_CORECLOCK / 1)
CLOCK_APB1_DIV
1
RCC_CFGR_PPRE_DIV1      /* max 48MHz */
CLOCK_APB1
1
(CLOCK_CORECLOCK / 1)
CLOCK_APB2
1
(CLOCK_APB1)
CLOCK_PLL_PREDIV
1
(1)
CLOCK_PLL_MUL
1
(6)
const timer_conf_t timer_config()
1
2
3
4
5
6
7
8
9
= {
    {
        .dev      = TIM1,
        .max      = 0x0000ffff,
        .rcc_mask = RCC_APB2ENR_TIM1EN,
        .bus      = APB2,
        .irqn     = TIM1_CC_IRQn
    }
}
TIMER_0_ISR
1
(isr_tim1_cc)
TIMER_NUMOF
1
(sizeof(timer_config) / sizeof(timer_config[0]))
const uart_conf_t uart_config()
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 9
10
11
12
13
14
15
16
17
18
19
20
21
22
= {
    {
        .dev        = USART2,
        .rcc_mask   = RCC_APB1ENR_USART2EN,
        .rx_pin     = GPIO_PIN(PORT_A, 3),
        .tx_pin     = GPIO_PIN(PORT_A, 2),
        .rx_af      = GPIO_AF1,
        .tx_af      = GPIO_AF1,
        .bus        = APB1,
        .irqn       = USART2_IRQn
    },
    {
        .dev        = USART1,
        .rcc_mask   = RCC_APB2ENR_USART1EN,
        .rx_pin     = GPIO_PIN(PORT_A, 10),
        .tx_pin     = GPIO_PIN(PORT_A, 9),
        .rx_af      = GPIO_AF1,
        .tx_af      = GPIO_AF1,
        .bus        = APB2,
        .irqn       = USART1_IRQn
    }
}
UART_0_ISR
1
(isr_usart2)
UART_1_ISR
1
(isr_usart1)
UART_NUMOF
1
(sizeof(uart_config) / sizeof(uart_config[0]))
const pwm_conf_t pwm_config()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
17
18
19
20
21
22
= {
    {
        .dev      = TIM3,
        .rcc_mask = RCC_APB1ENR_TIM3EN,
        .chan     = { { .pin = GPIO_PIN(PORT_B, 4) , .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_B, 5) , .cc_chan = 1},
                      { .pin = GPIO_UNDEF,                   .cc_chan = 0},
                      { .pin = GPIO_UNDEF,                   .cc_chan = 0} },
        .af       = GPIO_AF1,
        .bus      = APB1
    },
    {
        .dev      = TIM15,
        .rcc_mask = RCC_APB2ENR_TIM15EN,
        .chan     = { { .pin = GPIO_PIN(PORT_B, 14), .cc_chan = 0},
                      { .pin = GPIO_PIN(PORT_B, 15), .cc_chan = 1},
                      { .pin = GPIO_UNDEF,           .cc_chan = 0},
                      { .pin = GPIO_UNDEF,           .cc_chan = 0} },
        .af       = GPIO_AF1,
        .bus      = APB2
    }
}
PWM_NUMOF
1
(sizeof(pwm_config) / sizeof(pwm_config[0]))
const uint8_t spi_divtable()
 1
 2
 3
 4
 5
 6
 7
 8
 9
10
11
12
13
14
15
16
= {
    {       
        7,  
        6,  
        5,  
        2,  
        1   
    },
    {       
        7,  
        6,  
        5,  
        2,  
        1   
    }
}
const spi_conf_t spi_config()
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10
11
12
13
14
15
16
17
18
19
20
21
22
= {
    {
        .dev      = SPI1,
        .mosi_pin = GPIO_PIN(PORT_A, 7),
        .miso_pin = GPIO_PIN(PORT_A, 6),
        .sclk_pin = GPIO_PIN(PORT_A, 5),
        .cs_pin   = GPIO_PIN(PORT_A, 4),
        .af       = GPIO_AF0,
        .rccmask  = RCC_APB2ENR_SPI1EN,
        .apbbus   = APB2
    },
    {
        .dev      = SPI2,
        .mosi_pin = GPIO_PIN(PORT_B, 15),
        .miso_pin = GPIO_PIN(PORT_B, 14),
        .sclk_pin = GPIO_PIN(PORT_B, 13),
        .cs_pin   = GPIO_PIN(PORT_B, 12),
        .af       = GPIO_AF0,
        .rccmask  = RCC_APB1ENR_SPI2EN,
        .apbbus   = APB1
    },
}
SPI_NUMOF
1
(sizeof(spi_config) / sizeof(spi_config[0]))
ADC_CONFIG
1
2
3
4
5
6
7
8
{            \
    { GPIO_PIN(PORT_A, 0), 0 }, \
    { GPIO_PIN(PORT_A, 1), 1 }, \
    { GPIO_PIN(PORT_A, 4), 4 }, \
    { GPIO_PIN(PORT_B, 0), 8 }, \
    { GPIO_PIN(PORT_C, 1), 11 },\
    { GPIO_PIN(PORT_C, 0), 10 } \
}
ADC_NUMOF
1
(6)
RTC_NUMOF

Nucleos with MB1136 C-02 or MB1136 C-03 -sticker on it have the required LSE oscillator provided on the X2 slot. 

1
(1U)

See Nucleo User Manual UM1724 section 5.6.2.