lpc2387/include/periph_cpu.h

CPU specific definitions for internal peripheral handling.

__IO

LPC2387 MCU defines. 

1
volatile
FIO_PORTS
1
((FIO_PORT_t*)FIO_BASE_ADDR)
PINSEL
1
((__IO uint32_t *)(PINSEL_BASE_ADDR))
PINMODE
1
((__IO uint32_t *)(PINSEL_BASE_ADDR + 0x40))
GPIO_PIN( port, pin)
1
(port<<5 | pin)
TIMER_CHAN_NUMOF

Number of available timer channels. 

1
(4U)
PERIPH_SPI_NEEDS_INIT_CS

Declare needed generic SPI functions.

PERIPH_SPI_NEEDS_TRANSFER_BYTE
PERIPH_SPI_NEEDS_TRANSFER_REG
PERIPH_SPI_NEEDS_TRANSFER_REGS
int gpio_init_mux(unsigned pin, unsigned mux)
void gpio_init_states(void)
HAVE_SPI_CLK_T

Override SPI clock speed values.

enum spi_clk_t
SPI_CLK_4MHZ = 4000000
drive the SPI bus with 4MHz
SPI_CLK_100KHZ = SPI_CLK_SEL(0, 1, 1)
16/128 -> 125KHz
SPI_CLK_400KHZ = SPI_CLK_SEL(1, 1, 0)
16/32 -> 500KHz
SPI_CLK_1MHZ = SPI_CLK_SEL(0, 0, 1)
16/16 -> 1MHz
SPI_CLK_5MHZ = SPI_CLK_SEL(0, 0, 0)
16/4 -> 4MHz
SPI_CLK_10MHZ = SPI_CLK_SEL(1, 0, 0)
16/2 -> 8MHz
struct FIO_PORT_t

Fast GPIO register definition struct.

lpc2387/include/periph_cpu.h::__IO uint32_t DIR

Direction: Output if corresponding bit is set, otherwise input.

lpc2387/include/periph_cpu.h::__IO uint32_t MASK

Set bits to ignore corresponding bits when accessing PIN, SET or CLR register of this port.

lpc2387/include/periph_cpu.h::__IO uint32_t PIN

The current state of each pin of this port is accessible here (regardless of direction): If bit is set input is high.

lpc2387/include/periph_cpu.h::__IO uint32_t SET

Output pins are set to high by setting the corresponding bit.

lpc2387/include/periph_cpu.h::__IO uint32_t CLR

Output pins are set to low by setting the corresponding bit.