context_frame.h¶
Thread context frame stored on stack.
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pad_OFFSET
¶ 1
0
-
pc_OFFSET
¶ 1
8
-
s0_OFFSET
¶ 1
12
-
s1_OFFSET
¶ 1
16
-
s2_OFFSET
¶ 1
20
-
s3_OFFSET
¶ 1
24
-
s4_OFFSET
¶ 1
28
-
s5_OFFSET
¶ 1
32
-
s6_OFFSET
¶ 1
36
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s7_OFFSET
¶ 1
40
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s8_OFFSET
¶ 1
44
-
s9_OFFSET
¶ 1
48
-
s10_OFFSET
¶ 1
52
-
s11_OFFSET
¶ 1
56
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ra_OFFSET
¶ 1
60
-
tp_OFFSET
¶ 1
64
-
t0_OFFSET
¶ 1
68
-
t1_OFFSET
¶ 1
72
-
t2_OFFSET
¶ 1
76
-
t3_OFFSET
¶ 1
80
-
t4_OFFSET
¶ 1
84
-
t5_OFFSET
¶ 1
88
-
t6_OFFSET
¶ 1
92
-
a0_OFFSET
¶ 1
96
-
a1_OFFSET
¶ 1
100
-
a2_OFFSET
¶ 1
104
-
a3_OFFSET
¶ 1
108
-
a4_OFFSET
¶ 1
112
-
a5_OFFSET
¶ 1
116
-
a6_OFFSET
¶ 1
120
-
a7_OFFSET
¶ 1
124
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CONTEXT_FRAME_SIZE
¶ Size of context switch frame.
1
(a7_OFFSET + 4)
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struct
context_switch_frame
¶ Stores the registers and PC for a context switch.
This also defines context_switch_frame offsets for assembly language. The structure is sized to maintain 16 byte stack alignment per the ABI. https://github.com/riscv/riscv-elf-psabi-doc
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uint32_t
pad
()¶ padding to maintain 16 byte alignment
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uint32_t
pc
¶ program counter
-
uint32_t
s0
¶ s0 register
-
uint32_t
s1
¶ s1 register
-
uint32_t
s2
¶ s2 register
-
uint32_t
s3
¶ s3 register
-
uint32_t
s4
¶ s4 register
-
uint32_t
s5
¶ s5 register
-
uint32_t
s6
¶ s6 register
-
uint32_t
s7
¶ s7 register
-
uint32_t
s8
¶ s8 register
-
uint32_t
s9
¶ s9 register
-
uint32_t
s10
¶ s10 register
-
uint32_t
s11
¶ s11 register
-
uint32_t
ra
¶ ra register
-
uint32_t
tp
¶ tp register
-
uint32_t
t0
¶ t0 register
-
uint32_t
t1
¶ t1 register
-
uint32_t
t2
¶ t2 register
-
uint32_t
t3
¶ t3 register
-
uint32_t
t4
¶ t4 register
-
uint32_t
t5
¶ t5 register
-
uint32_t
t6
¶ t6 register
-
uint32_t
a0
¶ a0 register
-
uint32_t
a1
¶ a1 register
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uint32_t
a2
¶ a2 register
-
uint32_t
a3
¶ a3 register
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uint32_t
a4
¶ a4 register
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uint32_t
a5
¶ a5 register
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uint32_t
a6
¶ a6 register
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uint32_t
a7
¶ a7 register
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uint32_t