cfg_clock_180_8_1.h¶
Configure STM32F4 clock to 180MHz using PLL.
-
CLOCK_CORECLOCK¶ 1
(180000000U)
-
CLOCK_HSE¶ 1
(8000000U)
-
CLOCK_LSE¶ 1
(1)
-
CLOCK_AHB_DIV¶ 1
RCC_CFGR_HPRE_DIV1
-
CLOCK_AHB¶ 1
(CLOCK_CORECLOCK / 1)
-
CLOCK_APB1_DIV¶ 1
RCC_CFGR_PPRE1_DIV4 /* max 45MHz */
-
CLOCK_APB1¶ 1
(CLOCK_CORECLOCK / 4)
-
CLOCK_APB2_DIV¶ 1
RCC_CFGR_PPRE2_DIV2 /* max 90MHz */
-
CLOCK_APB2¶ 1
(CLOCK_CORECLOCK / 2)
-
CLOCK_PLL_M¶ 1
(4)
-
CLOCK_PLL_N¶ 1
(180)
-
CLOCK_PLL_P¶ 1
(2)
-
CLOCK_PLL_Q¶ 1
(0)
-
CLOCK_ENABLE_PLL_SAI¶ 1
(1)
-
CLOCK_PLL_SAI_M¶ 1
(4)
-
CLOCK_PLL_SAI_N¶ 1
(192)
-
CLOCK_PLL_SAI_P¶ 1
(8)
-
CLOCK_PLL_SAI_Q¶ 1
(0)
-
CLOCK_USE_ALT_48MHZ¶ 1
(1)