cfg_clock_168_16_0.h¶

Configure STM32F4 clock to 168MHz using PLL.

CLOCK_CORECLOCK¶

(168000000U)

CLOCK_HSE¶

(16000000U)

CLOCK_LSE¶

(0)

CLOCK_AHB_DIV¶

1	RCC_CFGR_HPRE_DIV1

CLOCK_AHB¶

(CLOCK_CORECLOCK / 1)

CLOCK_APB1_DIV¶

1	RCC_CFGR_PPRE1_DIV4 /* max 42MHz */

CLOCK_APB1¶

(CLOCK_CORECLOCK / 4)

CLOCK_APB2_DIV¶

1	RCC_CFGR_PPRE2_DIV2 /* max 84MHz */

CLOCK_APB2¶

(CLOCK_CORECLOCK / 2)

CLOCK_PLL_M¶

(8)

CLOCK_PLL_N¶

(168)

CLOCK_PLL_P¶

(2)

CLOCK_PLL_Q¶

(7)