cc110x-defines.h

Driver internal constants for CC110x chip configuration.

VARIABLE_PKTLEN

Variable packet length PKTCTRL0 bit configuration.

(0x01)

If variable packet length is configured in PKTCTRL0 the first byte after the synch word determines the packet length.

CC110X_RSSI_OFFSET

RSSI calculation offset.

(74)

The cc1101 has 74 as a RSSI offset. The CC1100E has a slightly larger offset of 75 to 79 (not implemented here). With those devices we thus get a slightly optimistic result.

CRC_OK

Bitmask (=10000000) for reading CRC_OK.

(0x80)

If CRC_OK == 1: CRC for received data OK (or CRC disabled). If CRC_OK == 0: CRC error in received data.

LQI_EST

Bitmask (=01111111) for reading LQI_EST.

(0x7F)

The Link Quality Indicator estimates how easily a received signal can be demodulated.

I_RSSI

Index 0 contains RSSI information (from optionally appended packet status bytes).

(0x00)

I_LQI

Index 1 contains LQI & CRC_OK information (from optionally appended packet status bytes).

(0x01)

MARC_STATE

Bitmask (=00011111) for reading MARC_STATE in MARCSTATE status register.

(0x1F)

PKTSTATUS_CS

Bitmask (=01000000) for reading CS (Carrier Sense) in PKTSTATUS status register.

(0x40)

PKTSTATUS_PQT_REACHED

Bitmask (=00100000) for reading PQT_REACHED (Preamble Quality reached) in PKTSTATUS status register.

(0x20)

PKTSTATUS_CCA

Bitmask (=00010000) for reading CCA (clear channel assessment) in PKTSTATUS status register.

(0x10)

PKTSTATUS_SFD

Bitmask (=00001000) for reading SFD (Sync word found) in PKTSTATUS status register.

(0x08)

PKTSTATUS_GDO2

Bitmask (=00000100) for reading GDO2 (current value on GDO2 pin) in PKTSTATUS status register.

(0x04)

PKTSTATUS_GDO1

Bitmask (=00000010) for reading GDO1 (current value on GDO1 pin) in PKTSTATUS status register.

(0x02)

PKTSTATUS_GDO0

Bitmask (=00000001) for reading GDO0 (current value on GDO0 pin) in PKTSTATUS status register.

(0x01)

TXFIFO_UNDERFLOW

Bitmask (=10000000) for reading TXFIFO_UNDERFLOW in TXBYTES status register.

(0x80)

BYTES_IN_TXFIFO

Bitmask (=01111111) for reading NUM_TXBYTES in TXBYTES status register.

(0x7F)

RXFIFO_OVERFLOW

Bitmask (=10000000) for reading RXFIFO_OVERFLOW in RXBYTES status register.

(0x80)

BYTES_IN_RXFIFO

Bitmask (=01111111) for reading NUM_RXBYTES in RXBYTES status register.

(0x7F)

PKT_LENGTH_CONFIG

Bitmask (=00000011) for reading LENGTH_CONFIG in PKTCTRL0 configuration register.

(0x03)

CC110X_WRITE_BURST

Offset for burst write.

(0x40)

CC110X_READ_SINGLE

Offset for read single byte.

(0x80)

CC110X_READ_BURST

Offset for read burst.

(0xC0)

CC110X_NOBYTE

No command (for reading).

(0xFF)

CC110X_IOCFG2

GDO2 output pin configuration.

(0x00)

CC110X_IOCFG1

GDO1 output pin configuration.

(0x01)

CC110X_IOCFG0

GDO0 output pin configuration.

(0x02)

CC110X_FIFOTHR

RX FIFO and TX FIFO thresholds.

(0x03)

CC110X_SYNC1

Sync word, high byte.

(0x04)

CC110X_SYNC0

Sync word, low byte.

(0x05)

CC110X_PKTLEN

Packet length.

(0x06)

CC110X_PKTCTRL1

Packet automation control.

(0x07)

CC110X_PKTCTRL0

Packet automation control.

(0x08)

CC110X_ADDR

Device address.

(0x09)

CC110X_CHANNR

Channel number.

(0x0A)

CC110X_FSCTRL1

Frequency synthesizer control.

(0x0B)

CC110X_FSCTRL0

Frequency synthesizer control.

(0x0C)

CC110X_FREQ2

Frequency control word, high byte.

(0x0D)

CC110X_FREQ1

Frequency control word, middle byte.

(0x0E)

CC110X_FREQ0

Frequency control word, low byte.

(0x0F)

CC110X_MDMCFG4

Modem configuration.

(0x10)

CC110X_MDMCFG3

Modem configuration.

(0x11)

CC110X_MDMCFG2

Modem configuration.

(0x12)

CC110X_MDMCFG1

Modem configuration.

(0x13)

CC110X_MDMCFG0

Modem configuration.

(0x14)

CC110X_DEVIATN

Modem deviation setting.

(0x15)

CC110X_MCSM2

Main Radio Control State Machine configuration.

(0x16)

CC110X_MCSM1

Main Radio Control State Machine configuration.

(0x17)

CC110X_MCSM0

Main Radio Control State Machine configuration.

(0x18)

CC110X_FOCCFG

Frequency Offset Compensation configuration.

(0x19)

CC110X_BSCFG

Bit Synchronization configuration.

(0x1A)

CC110X_AGCCTRL2

AGC control.

(0x1B)

CC110X_AGCCTRL1

AGC control.

(0x1C)

CC110X_AGCCTRL0

AGC control.

(0x1D)

CC110X_WOREVT1

High byte Event 0 timeout.

(0x1E)

CC110X_WOREVT0

Low byte Event 0 timeout.

(0x1F)

CC110X_WORCTRL

Wake On Radio control.

(0x20)

CC110X_FREND1

Front end RX configuration.

(0x21)

CC110X_FREND0

Front end TX configuration.

(0x22)

CC110X_FSCAL3

Frequency synthesizer calibration.

(0x23)

CC110X_FSCAL2

Frequency synthesizer calibration.

(0x24)

CC110X_FSCAL1

Frequency synthesizer calibration.

(0x25)

CC110X_FSCAL0

Frequency synthesizer calibration.

(0x26)

CC110X_RCCTRL1

RC oscillator configuration.

(0x27)

CC110X_RCCTRL0

RC oscillator configuration.

(0x28)

CC110X_FSTEST

Frequency synthesizer calibration control.

(0x29)

CC110X_PTEST

Production test.

(0x2A)

CC110X_AGCTEST

AGC test.

(0x2B)

CC110X_TEST2

Various test settings.

(0x2C)

CC110X_TEST1

Various test settings.

(0x2D)

CC110X_TEST0

Various test settings.

(0x2E)

CC110X_SRES

Reset chip.

(0x30)

CC110X_SFSTXON

Enable and calibrate frequency synthesizer (if MCSM0.FS_AUTOCAL=1).

(0x31)

If in RX/TX: Go to a wait state where only the synthesizer is running (for quick RX / TX turnaround).

CC110X_SXOFF

Turn off crystal oscillator.

(0x32)

CC110X_SCAL

Calibrate frequency synthesizer and turn it off (enables quick start).

(0x33)

CC110X_SRX

Enable RX.

(0x34)

Perform calibration first if coming from IDLE and MCSM0.FS_AUTOCAL=1.

CC110X_STX

In IDLE state: Enable TX.

(0x35)

Perform calibration first if MCSM0.FS_AUTOCAL=1. If in RX state and CCA is enabled: Only go to TX if channel is clear.

CC110X_SIDLE

Exit RX / TX, turn off frequency synthesizer and exit WOR mode if applicable.

(0x36)

CC110X_SAFC

Perform AFC adjustment of the frequency synthesizer.

(0x37)

CC110X_SWOR

Start automatic RX polling sequence (Wake-on-Radio)

(0x38)

CC110X_SPWD

Enter power down mode when CSn goes high.

(0x39)

CC110X_SFRX

Flush the RX FIFO buffer (CC110X should be in IDLE state).

(0x3A)

CC110X_SFTX

Flush the TX FIFO buffer (CC110X should be in IDLE state).

(0x3B)

CC110X_SWORRST

Reset real time clock.

(0x3C)

CC110X_SNOP

No operation.

(0x3D)

May be used to pad strobe commands to two bytes for simpler software.

CC110X_PARTNUM

Part number of CC110X.

(0x30)

CC110X_VERSION

Current version number.

(0x31)

CC110X_FREQEST

Frequency Offset Estimate.

(0x32)

CC110X_LQI

Demodulator estimate for Link Quality.

(0x33)

CC110X_RSSI

Received signal strength indication.

(0x34)

CC110X_MARCSTATE

Control state machine state.

(0x35)

CC110X_WORTIME1

High byte of WOR timer.

(0x36)

CC110X_WORTIME0

Low byte of WOR timer.

(0x37)

CC110X_PKTSTATUS

Current GDOx status and packet status.

(0x38)

CC110X_VCO_VC_DAC

Current setting from PLL calibration module.

(0x39)

CC110X_TXBYTES

Underflow and number of bytes in the TX FIFO.

(0x3A)

CC110X_RXBYTES

Overflow and number of bytes in the RX FIFO.

(0x3B)

CC110X_PATABLE

Register for eight user selected output power settings.

(0x3E)

3-bit FREND0.PA_POWER value selects the PATABLE entry to use.

CC110X_TXFIFO

TX FIFO: Write operations write to the TX FIFO (SB: +0x00; BURST: +0x40)

(0x3F)

CC110X_RXFIFO

RX FIFO: Read operations read from the RX FIFO (SB: +0x80; BURST: +0xC0)

(0x3F)

CC110X_GDO_HIGH_ON_RX_FIFO_ABOVE_THRESHOLD

GDO goes high when RX FIFO is filled at or above threshold.

(0x00)

CC110X_GDO_HIGH_ON_RX_FIFO_FILLED_OR_PKT_END

GDO goes high when RX FIFO is filled at or above threshold or when packet is fully received.

(0x01)

CC110X_GDO_LOW_ON_TX_FIFO_BELOW_THRESHOLD

GDO goes low when TX FIFO is filled less than threshold.

(0x02)

CC110X_GDO_LOW_ON_TX_FIFO_EMPTY

GDO goes low when TX FIFO becomes empty.

(0x03)

CC110X_GDO_HIGH_ON_RX_FIFO_OVERFLOW

GDO goes high when RX FIFO overflows.

(0x04)

CC110X_GDO_HIGH_ON_TX_FIFO_UNDERFLOW

GDO goes high when TX FIFO underflows.

(0x05)

CC110X_GDO_HIGH_ON_SYNC_WORD

GDO goes high when sync word was just received until the packet is fully received, or when sync word has been send until packet is fully send.

(0x06)

CC110X_GDO_HIGH_ON_PACKET_RECEIVED

GDO goes high when a packet is received and CRC is correct.

(0x07)

Goes back to low when first byte of RX fifo has been read