boards/mulle/include/periph_conf.h¶
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RTC_LOAD_CAP_BITS
¶ 1
(RTC_CR_SC8P_MASK | RTC_CR_SC4P_MASK | RTC_CR_SC2P_MASK)
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CLOCK_CORECLOCK
¶ 1
(48000000ul)
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CLOCK_BUSCLOCK
¶ 1
(CLOCK_CORECLOCK / 1)
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const clock_config_t
clock_config
¶ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26
= { .clkdiv1 = SIM_CLKDIV1_OUTDIV1(0) | SIM_CLKDIV1_OUTDIV2(0) | SIM_CLKDIV1_OUTDIV3(1) | SIM_CLKDIV1_OUTDIV4(1), .rtc_clc = RTC_LOAD_CAP_BITS, .osc32ksel = SIM_SOPT1_OSC32KSEL(2), .clock_flags = KINETIS_CLOCK_RTCOSC_EN | KINETIS_CLOCK_USE_FAST_IRC | 0, .default_mode = KINETIS_MCG_MODE_FEE, .erc_range = KINETIS_MCG_ERC_RANGE_LOW, .osc_clc = OSC_CR_SC16P_MASK, .oscsel = MCG_C7_OSCSEL(1), .fcrdiv = MCG_SC_FCRDIV(0), .fll_frdiv = MCG_C1_FRDIV(0b000), .fll_factor_fei = KINETIS_MCG_FLL_FACTOR_1464, .fll_factor_fee = KINETIS_MCG_FLL_FACTOR_1464, .pll_prdiv = MCG_C5_PRDIV0(0b00111), .pll_vdiv = MCG_C6_VDIV0(0b01100), }
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PIT_NUMOF
¶ 1
(2U)
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PIT_CONFIG
¶ 1 2 3 4 5 6 7 8 9 10
{ \ { \ .prescaler_ch = 0, \ .count_ch = 1, \ }, \ { \ .prescaler_ch = 2, \ .count_ch = 3, \ }, \ }
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LPTMR_NUMOF
¶ 1
(1U)
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LPTMR_CONFIG
¶ 1 2 3 4 5 6 7 8
{ \ { \ .dev = LPTMR0, \ .irqn = LPTMR0_IRQn, \ .src = 2, \ .base_freq = 32768u, \ } \ }
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TIMER_NUMOF
¶ 1
((PIT_NUMOF) + (LPTMR_NUMOF))
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PIT_BASECLOCK
¶ 1
(CLOCK_BUSCLOCK)
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PIT_ISR_0
¶ 1
isr_pit1
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PIT_ISR_1
¶ 1
isr_pit3
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LPTMR_ISR_0
¶ 1
isr_lptmr0
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UART_0_ISR
¶ 1
(isr_uart0_rx_tx)
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UART_1_ISR
¶ 1
(isr_uart1_rx_tx)
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UART_NUMOF
¶ 1
(sizeof(uart_config) / sizeof(uart_config[0]))
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const uart_conf_t
uart_config
()¶ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
= { { .dev = UART0, .freq = CLOCK_CORECLOCK, .pin_rx = GPIO_PIN(PORT_A, 15), .pin_tx = GPIO_PIN(PORT_A, 14), .pcr_rx = PORT_PCR_MUX(3), .pcr_tx = PORT_PCR_MUX(3), .irqn = UART0_RX_TX_IRQn, .scgc_addr = &SIM->SCGC4, .scgc_bit = SIM_SCGC4_UART0_SHIFT, .mode = UART_MODE_8N1, .type = KINETIS_UART, }, { .dev = UART1, .freq = CLOCK_CORECLOCK, .pin_rx = GPIO_PIN(PORT_C, 3), .pin_tx = GPIO_PIN(PORT_C, 4), .pcr_rx = PORT_PCR_MUX(3), .pcr_tx = PORT_PCR_MUX(3), .irqn = UART1_RX_TX_IRQn, .scgc_addr = &SIM->SCGC4, .scgc_bit = SIM_SCGC4_UART1_SHIFT, .mode = UART_MODE_8N1, .type = KINETIS_UART, }, }
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ADC_NUMOF
¶ 1
(sizeof(adc_config) / sizeof(adc_config[0]))
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ADC_REF_SETTING
¶ 1
0
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const adc_conf_t
adc_config
()¶
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DAC_NUMOF
¶ 1
(sizeof(dac_config) / sizeof(dac_config[0]))
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const dac_conf_t
dac_config
()¶ 1 2 3 4 5 6 7
= { { .dev = DAC0, .scgc_addr = &SIM->SCGC2, .scgc_bit = SIM_SCGC2_DAC0_SHIFT } }
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PWM_NUMOF
¶ 1
(sizeof(pwm_config) / sizeof(pwm_config[0]))
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const pwm_conf_t
pwm_config
()¶ 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24
= { { .ftm = FTM0, .chan = { { .pin = GPIO_PIN(PORT_C, 1), .af = 4, .ftm_chan = 0 }, { .pin = GPIO_PIN(PORT_C, 2), .af = 4, .ftm_chan = 1 }, { .pin = GPIO_UNDEF, .af = 0, .ftm_chan = 0 }, { .pin = GPIO_UNDEF, .af = 0, .ftm_chan = 0 } }, .chan_numof = 2, .ftm_num = 0 }, { .ftm = FTM1, .chan = { { .pin = GPIO_PIN(PORT_A, 12), .af = 3, .ftm_chan = 0 }, { .pin = GPIO_PIN(PORT_A, 13), .af = 3, .ftm_chan = 1 }, { .pin = GPIO_UNDEF, .af = 0, .ftm_chan = 0 }, { .pin = GPIO_UNDEF, .af = 0, .ftm_chan = 0 } }, .chan_numof = 2, .ftm_num = 1 } }
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SPI_NUMOF
¶ 1
(sizeof(spi_config) / sizeof(spi_config[0]))
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const uint32_t
spi_clk_config
()¶
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const spi_conf_t
spi_config
()¶
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I2C_NUMOF
¶ 1
(sizeof(i2c_config) / sizeof(i2c_config[0]))
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I2C_0_ISR
¶ 1
(isr_i2c0)
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I2C_1_ISR
¶ 1
(isr_i2c1)
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const i2c_conf_t
i2c_config
()¶ 1 2 3 4 5 6 7 8 9 10 11 12
= { { .i2c = I2C0, .scl_pin = GPIO_PIN(PORT_B, 2), .sda_pin = GPIO_PIN(PORT_B, 1), .freq = CLOCK_BUSCLOCK, .speed = I2C_SPEED_FAST, .irqn = I2C0_IRQn, .scl_pcr = (PORT_PCR_MUX(2) | PORT_PCR_ODE_MASK), .sda_pcr = (PORT_PCR_MUX(2) | PORT_PCR_ODE_MASK), }, }