adxl345_regs.h

Register and bit definitions for the ADXL345.

ADXL345_CHIP_ID_REG

Device ID. 

1
(0x00)
ADXL345_THRESH_TAP

Tap threshold. 

1
(0x1D)
ADXL345_OFFSET_X

X-axis offset. 

1
(0x1E)
ADXL345_OFFSET_Y

Y-axis offset. 

1
(0x1F)
ADXL345_OFFSET_Z

Z-axis offset. 

1
(0x20)
ADXL345_TAP_DUR

Tap duration. 

1
(0x21)
ADXL345_TAP_LAT

Tap latency. 

1
(0x22)
ADXL345_TAP_WIN

Tap window. 

1
(0x23)
ADXL345_THRESH_ACT

Activity threshold. 

1
(0x24)
ADXL345_THRESH_INACT

Inactivity threshold. 

1
(0x25)
ADXL345_TIME_INACT

Inactivity time. 

1
(0x26)
ADXL345_ACT_INACT_CTL

Axis enable control for activity and inactivity detection. 

1
(0x27)
ADXL345_THRESH_FF

Free-fall threshold. 

1
(0x28)
ADXL345_TIME_FF

Free-fall time. 

1
(0x29)
ADXL345_TAP_AXES

Axis control for single tap/double tap. 

1
(0x2A)
ADXL345_ACT_TAP_STATUS

Source of single tap/double tap. 

1
(0x2B)
ADXL345_BW_RATE

Data rate and power mode control. 

1
(0x2C)
ADXL345_POWER_CTL

Power-saving features control. 

1
(0x2D)
ADXL345_INT_ENABLE

Interrupt enable control. 

1
(0x2E)
ADXL345_INT_MAP

Interrupt mapping control. 

1
(0x2F)
ADXL345_INT_SOURCE

Source of interrupts. 

1
(0x30)
ADXL345_DATA_FORMAT

Data format control. 

1
(0x31)
ADXL345_DATA_X0

X-Axis Data 0. 

1
(0x32)
ADXL345_DATA_X1

X-Axis Data 1. 

1
(0x33)
ADXL345_DATA_Y0

Y-Axis Data 0. 

1
(0x34)
ADXL345_DATA_Y1

Y-Axis Data 1. 

1
(0x35)
ADXL345_DATA_Z0

Z-Axis Data 0. 

1
(0x36)
ADXL345_DATA_Z1

Z-Axis Data 1. 

1
(0x37)
ADXL345_FIFO_CTL

FIFO control. 

1
(0x38)
ADXL345_FIFO_STATUS

FIFO status. 

1
(0x39)
ADXL345_CHIP_ID
1
(0xE5)
ADXL345_RES_10_BITS
1
(0x03FF)
ADXL345_RES_11_BITS
1
(0x07FF)
ADXL345_RES_12_BITS
1
(0x0FFF)
ADXL345_RES_13_BITS
1
(0x1FFF)
ADXL345_INACT_Z_ENABLE
1
(1 << 0)
ADXL345_INACT_Y_ENABLE
1
(1 << 1)
ADXL345_INACT_X_ENABLE
1
(1 << 2)
ADXL345_INACT_ACDC
1
(1 << 3)
ADXL345_ACT_Z_ENABLE
1
(1 << 4)
ADXL345_ACT_Y_ENABLE
1
(1 << 5)
ADXL345_ACT_X_ENABLE
1
(1 << 6)
ADXL345_ACT_ACDC
1
(1 << 7)
ADXL345_TAP_Z_ENABLE
1
(1 << 0)
ADXL345_TAP_Y_ENABLE
1
(1 << 1)
ADXL345_TAP_X_ENABLE
1
(1 << 2)
ADXL345_SUPPRESS
1
(1 << 3)
ADXL345_TAP_ALL_ENABLE
1
2
3
(ADXL345_TAP_Z_ENABLE | \
                                   ADXL345_TAP_Y_ENABLE | \
                                   ADXL345_TAP_X_ENABLE)
ADXL345_TAP_Z_SRC
1
(1 << 0)
ADXL345_TAP_Y_SRC
1
(1 << 1)
ADXL345_TAP_X_SRC
1
(1 << 2)
ADXL345_ASLEEP
1
(1 << 3)
ADXL345_ACT_Z_SRC
1
(1 << 4)
ADXL345_ACT_Y_SRC
1
(1 << 5)
ADXL345_ACT_X_SRC
1
(1 << 6)
ADXL345_RATE_MASK
1
(0x0F)
ADXL345_LOWPOWER
1
(1 << 4)
ADXL345_WAKEUP_8HZ
1
(0x00)
ADXL345_WAKEUP_4HZ
1
(0x01)
ADXL345_WAKEUP_2HZ
1
(0x02)
ADXL345_WAKEUP_1HZ
1
(0x03)
ADXL345_SLEEP_BIT
1
(1 << 2)
ADXL345_MEASURE_BIT
1
(1 << 3)
ADXL345_AUTOSLEEP_BIT
1
(1 << 4)
ADXL345_LINK_BIT
1
(1 << 5)
ADXL345_OVERRUN
1
(1 << 0)
ADXL345_WATERMARK
1
(1 << 1)
ADXL345_FREEFALL
1
(1 << 2)
ADXL345_INACTIVITY
1
(1 << 3)
ADXL345_ACTIVITY
1
(1 << 4)
ADXL345_DOUBLE_TAP
1
(1 << 5)
ADXL345_SINGLE_TAP
1
(1 << 6)
ADXL345_DATA_READY
1
(1 << 7)
ADXL345_RANGE_MASK
1
(0x03)
ADXL345_JUSTIFY
1
(1 << 2)
ADXL345_FULL_RES
1
(1 << 3)
ADXL345_INT_INVERT
1
(1 << 5)
ADXL345_SPI_BIT
1
(1 << 6)
ADXL345_SELF_TEST
1
(1 << 7)
ADXL345_SAMPLES_MASK
1
(0x0F)
ADXL345_FIFO_TRIGGER_POS
1
(4)
ADXL345_FIFO_TRIGGER
1
(1 << ADXL345_FIFO_TRIGGER_POS)
ADXL345_FIFO_MODE_POS
1
(6)
ADXL345_FIFO_MODE_MASK
1
(0xC0)
ADXL345_FIFO_ENTRIES_MASK
1
(0x3F)
ADXL345_FIFO_TRIG
1
(1 << 7)